diff mbox series

[19.11,V2,03/12] net/e1000: fix Tx descriptor status api (igb)

Message ID bd5fd337804c79971519d27aba3faefccdeea47b.1565190405.git.thierry.herbelot@6wind.com (mailing list archive)
State Superseded, archived
Delegated to: Ferruh Yigit
Headers
Series Miscellaneous fixes |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation fail Compilation issues

Commit Message

Thierry Herbelot Aug. 7, 2019, 3:09 p.m. UTC 
  From: Olivier Matz <olivier.matz@6wind.com>

The Tx descriptor status api was not behaving as expected. This API is
used to inspect the content of the descriptors in the Tx ring to
determine the length of the Tx queue.

Since the software advances the tail pointer and the hardware advances
the head pointer, the Tx queue is located before txq->tx_tail in the
ring. Therefore, a call to rte_eth_tx_descriptor_status(..., offset=20)
should inspect the 20th descriptor before the tail, not after.

Fixes: 978f8eea1719 ("net/e1000: implement descriptor status API (igb)")
Cc: stable@dpdk.org

Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
---
 drivers/net/e1000/igb_rxtx.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/e1000/igb_rxtx.c b/drivers/net/e1000/igb_rxtx.c
index c5606de5d7a0..c22118e59a21 100644
--- a/drivers/net/e1000/igb_rxtx.c
+++ b/drivers/net/e1000/igb_rxtx.c
@@ -1835,14 +1835,15 @@  eth_igb_tx_descriptor_status(void *tx_queue, uint16_t offset)
 {
 	struct igb_tx_queue *txq = tx_queue;
 	volatile uint32_t *status;
-	uint32_t desc;
+	int32_t desc;
 
 	if (unlikely(offset >= txq->nb_tx_desc))
 		return -EINVAL;
 
-	desc = txq->tx_tail + offset;
-	if (desc >= txq->nb_tx_desc)
-		desc -= txq->nb_tx_desc;
+	desc = txq->tx_tail - offset - 1;
+	if (desc < 0)
+		desc += txq->nb_tx_desc;
+	desc = txq->sw_ring[desc].last_id;
 
 	status = &txq->tx_ring[desc].wb.status;
 	if (*status & rte_cpu_to_le_32(E1000_TXD_STAT_DD))