[RFC,3/6] net/ixgbe: implement power management API
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Commit Message
Implement support for the power management API by implementing a
`next_rx_desc` function that will return an address of an RX ring's
status bit.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
drivers/net/ixgbe/ixgbe_ethdev.c | 1 +
drivers/net/ixgbe/ixgbe_rxtx.c | 22 ++++++++++++++++++++++
drivers/net/ixgbe/ixgbe_rxtx.h | 2 ++
3 files changed, 25 insertions(+)
@@ -605,6 +605,7 @@ static const struct eth_dev_ops ixgbe_eth_dev_ops = {
.udp_tunnel_port_del = ixgbe_dev_udp_tunnel_port_del,
.tm_ops_get = ixgbe_tm_ops_get,
.tx_done_cleanup = ixgbe_dev_tx_done_cleanup,
+ .next_rx_desc = ixgbe_next_rx_desc,
};
/*
@@ -1366,6 +1366,28 @@ const uint32_t
RTE_PTYPE_INNER_L3_IPV4_EXT | RTE_PTYPE_INNER_L4_UDP,
};
+int ixgbe_next_rx_desc(void *rx_queue, volatile void **tail_desc_addr,
+ uint64_t *expected, uint64_t *mask)
+{
+ volatile union ixgbe_adv_rx_desc *rxdp;
+ struct ixgbe_rx_queue *rxq = rx_queue;
+ uint16_t desc;
+
+ desc = rxq->rx_tail;
+ rxdp = &rxq->rx_ring[desc];
+ /* watch for changes in status bit */
+ *tail_desc_addr = &rxdp->wb.upper.status_error;
+
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ *expected = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);
+ *mask = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);
+
+ return 0;
+}
+
/* @note: fix ixgbe_dev_supported_ptypes_get() if any change here. */
static inline uint32_t
ixgbe_rxd_pkt_info_to_pkt_type(uint32_t pkt_info, uint16_t ptype_mask)
@@ -299,5 +299,7 @@ uint64_t ixgbe_get_tx_port_offloads(struct rte_eth_dev *dev);
uint64_t ixgbe_get_rx_queue_offloads(struct rte_eth_dev *dev);
uint64_t ixgbe_get_rx_port_offloads(struct rte_eth_dev *dev);
uint64_t ixgbe_get_tx_queue_offloads(struct rte_eth_dev *dev);
+int ixgbe_next_rx_desc(void *rx_queue, volatile void **tail_desc_addr,
+ uint64_t *expected, uint64_t *mask);
#endif /* _IXGBE_RXTX_H_ */