@@ -106,6 +106,34 @@ static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = {
{"egress_confirmed_frames", 2, 4},
{"cgr_reject_frames", 4, 0},
{"cgr_reject_bytes", 4, 1},
+ {"mac_rx_64 bytes", 0, 0},
+ {"mac_rx_65-127 bytes", 0, 0},
+ {"mac_rx_128-255 bytes", 0, 0},
+ {"mac_rx_256-511 bytes", 0, 0},
+ {"mac_rx_512-1023 bytes", 0, 0},
+ {"mac_rx_1024-1518 bytes", 0, 0},
+ {"mac_rx_1519-max bytes", 0, 0},
+ {"mac_rx_frags", 0, 0},
+ {"mac_rx_jabber", 0, 0},
+ {"mac_rx_frame discards", 0, 0},
+ {"mac_rx_align errors", 0, 0},
+ {"mac_tx_undersized", 0, 0},
+ {"mac_rx_oversized", 0, 0},
+ {"mac_rx_pause", 0, 0},
+ {"mac_tx_b-pause", 0, 0},
+ {"mac_rx_bytes", 0, 0},
+ {"mac_rx_m-cast", 0, 0},
+ {"mac_rx_b-cast", 0, 0},
+ {"mac_rx_all frames", 0, 0},
+ {"mac_rx_u-cast", 0, 0},
+ {"mac_rx_frame errors", 0, 0},
+ {"mac_tx_bytes", 0, 0},
+ {"mac_tx_m-cast", 0, 0},
+ {"mac_tx_b-cast", 0, 0},
+ {"mac_tx_u-cast", 0, 0},
+ {"mac_tx_frame errors", 0, 0},
+ {"mac_rx_frames ok", 0, 0},
+ {"mac_tx_frames ok", 0, 0},
};
static struct rte_dpaa2_driver rte_dpaa2_pmd;
@@ -1713,16 +1741,67 @@ dpaa2_dev_stats_get(struct rte_eth_dev *dev,
return retcode;
};
+void
+dpaa2_dev_mac_setup_stats(struct rte_eth_dev *dev)
+{
+ struct dpaa2_dev_priv *priv = dev->data->dev_private;
+ uint32_t *cnt_idx;
+ int i;
+
+ priv->cnt_idx_dma_mem = rte_malloc(NULL, DPAA2_MAC_STATS_INDEX_DMA_SIZE,
+ RTE_CACHE_LINE_SIZE);
+ if (!priv->cnt_idx_dma_mem) {
+ DPAA2_PMD_ERR("Failure to allocate memory for mac index");
+ goto out;
+ }
+
+ priv->cnt_values_dma_mem = rte_malloc(NULL, DPAA2_MAC_STATS_VALUE_DMA_SIZE,
+ RTE_CACHE_LINE_SIZE);
+ if (!priv->cnt_values_dma_mem) {
+ DPAA2_PMD_ERR("Failure to allocate memory for mac values");
+ goto err_alloc_values;
+ }
+
+ cnt_idx = priv->cnt_idx_dma_mem;
+ for (i = 0; i < DPAA2_MAC_NUM_STATS; i++)
+ *cnt_idx++ = rte_cpu_to_le_32((uint32_t)i);
+
+ priv->cnt_idx_iova = rte_mem_virt2iova(priv->cnt_idx_dma_mem);
+ if (priv->cnt_idx_iova == RTE_BAD_IOVA) {
+ DPAA2_PMD_ERR("%s: No IOMMU map for count index dma mem(%p)",
+ __func__, priv->cnt_idx_dma_mem);
+ goto err_dma_map;
+ }
+
+ priv->cnt_values_iova = rte_mem_virt2iova(priv->cnt_values_dma_mem);
+ if (priv->cnt_values_iova == RTE_BAD_IOVA) {
+ DPAA2_PMD_ERR("%s: No IOMMU map for count values dma mem(%p)",
+ __func__, priv->cnt_values_dma_mem);
+ goto err_dma_map;
+ }
+
+ return;
+
+err_dma_map:
+ rte_free(priv->cnt_values_dma_mem);
+err_alloc_values:
+ rte_free(priv->cnt_idx_dma_mem);
+out:
+ priv->cnt_idx_dma_mem = NULL;
+ priv->cnt_values_dma_mem = NULL;
+}
+
static int
dpaa2_dev_xstats_get(struct rte_eth_dev *dev,
struct rte_eth_xstat *xstats, unsigned int n)
{
- struct dpaa2_dev_priv *priv = dev->data->dev_private;
struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
- int32_t retcode;
+ unsigned int i = 0, j = 0, num = RTE_DIM(dpaa2_xstats_strings);
+ struct dpaa2_dev_priv *priv = dev->data->dev_private;
union dpni_statistics value[5] = {};
- unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings);
uint8_t page_id, stats_id;
+ uint64_t *cnt_values;
+ int32_t retcode;
if (n < num)
return num;
@@ -1748,8 +1827,8 @@ dpaa2_dev_xstats_get(struct rte_eth_dev *dev,
if (retcode)
goto err;
- for (i = 0; i < priv->max_cgs; i++) {
- if (!priv->cgid_in_use[i]) {
+ for (j = 0; j < priv->max_cgs; j++) {
+ if (!priv->cgid_in_use[j]) {
/* Get Counters from page_4*/
retcode = dpni_get_statistics(dpni, CMD_PRI_LOW,
priv->token,
@@ -1759,13 +1838,38 @@ dpaa2_dev_xstats_get(struct rte_eth_dev *dev,
break;
}
}
-
- for (i = 0; i < num; i++) {
+ while (i < (num - DPAA2_MAC_NUM_STATS)) {
xstats[i].id = i;
page_id = dpaa2_xstats_strings[i].page_id;
stats_id = dpaa2_xstats_strings[i].stats_id;
xstats[i].value = value[page_id].raw.counter[stats_id];
+ i++;
+ }
+
+ dpaa2_dev_mac_setup_stats(dev);
+ retcode = dpni_get_mac_statistics(dpni, CMD_PRI_LOW, priv->token,
+ priv->cnt_idx_iova, priv->cnt_values_iova,
+ DPAA2_MAC_NUM_STATS);
+ if (retcode) {
+ DPAA2_PMD_WARN("MAC (mac_*) counters are not supported!!");
+ rte_free(priv->cnt_values_dma_mem);
+ rte_free(priv->cnt_idx_dma_mem);
+ while (i >= (num - DPAA2_MAC_NUM_STATS) && i < num) {
+ xstats[i].id = i;
+ xstats[i].value = 0;
+ i++;
+ }
}
+ if (!retcode) {
+ cnt_values = priv->cnt_values_dma_mem;
+ while (i >= (num - DPAA2_MAC_NUM_STATS) && i < num) {
+ /* mac counters value */
+ xstats[i].id = i;
+ xstats[i].value = rte_le_to_cpu_64(*cnt_values++);
+ i++;
+ }
+ }
+
return i;
err:
DPAA2_PMD_ERR("Error in obtaining extended stats (%d)", retcode);
@@ -18,6 +18,7 @@
#include <mc/fsl_dpni.h>
#include <mc/fsl_mc_sys.h>
+#include <mc/fsl_dpmac.h>
#include "base/dpaa2_hw_dpni_annot.h"
@@ -133,6 +134,11 @@
#define DPAA2_PKT_TYPE_VLAN_1 0x0160
#define DPAA2_PKT_TYPE_VLAN_2 0x0260
+/* mac counters */
+#define DPAA2_MAC_NUM_STATS (DPMAC_CNT_EGR_GOOD_FRAME + 1)
+#define DPAA2_MAC_STATS_INDEX_DMA_SIZE (DPAA2_MAC_NUM_STATS * sizeof(uint32_t))
+#define DPAA2_MAC_STATS_VALUE_DMA_SIZE (DPAA2_MAC_NUM_STATS * sizeof(uint64_t))
+
/* Global pool used by driver for SG list TX */
extern struct rte_mempool *dpaa2_tx_sg_pool;
/* Maximum SG segments */
@@ -417,6 +423,10 @@ struct dpaa2_dev_priv {
uint8_t channel_inuse;
/* Stores correction offset for one step timestamping */
uint16_t ptp_correction_offset;
+ /* for mac counters */
+ uint32_t *cnt_idx_dma_mem;
+ uint64_t *cnt_values_dma_mem;
+ uint64_t cnt_idx_iova, cnt_values_iova;
struct dpaa2_dev_flow *curr;
LIST_HEAD(, dpaa2_dev_flow) flows;
@@ -502,4 +512,6 @@ int dpaa2_dev_recycle_qp_setup(struct rte_dpaa2_device *dpaa2_dev,
struct dpaa2_queue **txq,
struct dpaa2_queue **rxq);
+void
+dpaa2_dev_mac_setup_stats(struct rte_eth_dev *dev);
#endif /* _DPAA2_ETHDEV_H */
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
*
* Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016-2023 NXP
+ * Copyright 2016-2025 NXP
*
*/
#include <fsl_mc_sys.h>
@@ -3493,3 +3493,30 @@ int dpni_sp_enable(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
/* send command to MC */
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_get_mac_statistics() - Get statistics on the connected DPMAC objects
+ * @mc_io: Pointer to opaque I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPMAC object
+ * @iova_cnt: IOVA containing the requested MAC counters formatted as an
+ * array of __le32 representing the dpmac_counter_id.
+ * @iova_values: IOVA containing the values for all the requested counters
+ * formatted as an array of __le64.
+ * @num_cnt: Number of counters requested
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpni_get_mac_statistics(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+ uint64_t iova_cnt, uint64_t iova_values, uint32_t num_cnt)
+{
+ struct dpni_cmd_get_mac_statistics *cmd_params;
+ struct mc_command cmd = { 0 };
+
+ cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_MAC_STATISTICS, cmd_flags, token);
+ cmd_params = (struct dpni_cmd_get_mac_statistics *)cmd.params;
+ cmd_params->iova_cnt = cpu_to_le64(iova_cnt);
+ cmd_params->iova_values = cpu_to_le64(iova_values);
+ cmd_params->num_cnt = cpu_to_le32(num_cnt);
+
+ return mc_send_command(mc_io, &cmd);
+}
@@ -2014,4 +2014,7 @@ int dpni_set_sp_profile(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t to
int dpni_sp_enable(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
uint8_t type, uint8_t en);
+int dpni_get_mac_statistics(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+ uint64_t iova_cnt, uint64_t iova_values, uint32_t num_cnt);
+
#endif /* __FSL_DPNI_H */
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
*
* Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016-2023 NXP
+ * Copyright 2016-2025 NXP
*
*/
#ifndef _FSL_DPNI_CMD_H
@@ -9,7 +9,7 @@
/* DPNI Version */
#define DPNI_VER_MAJOR 8
-#define DPNI_VER_MINOR 4
+#define DPNI_VER_MINOR 6
#define DPNI_CMD_BASE_VERSION 1
#define DPNI_CMD_VERSION_2 2
@@ -131,6 +131,7 @@
#define DPNI_CMDID_SP_ENABLE DPNI_CMD(0x280)
#define DPNI_CMDID_SET_QUEUE_TX_CONFIRMATION_MODE DPNI_CMD(0x281)
#define DPNI_CMDID_GET_QUEUE_TX_CONFIRMATION_MODE DPNI_CMD(0x282)
+#define DPNI_CMDID_GET_MAC_STATISTICS DPNI_CMD(0x283)
/* Macros for accessing command fields smaller than 1byte */
#define DPNI_MASK(field) \
@@ -1024,5 +1025,11 @@ struct dpni_cmd_sp_enable {
uint8_t en;
};
+struct dpni_cmd_get_mac_statistics {
+ uint64_t iova_cnt;
+ uint64_t iova_values;
+ uint32_t num_cnt;
+};
+
#pragma pack(pop)
#endif /* _FSL_DPNI_CMD_H */