diff mbox series

[v15,3/4] pmu: support reading Intel x86_64 PMU events in runtime

Message ID 20241025085414.3412068-4-tduszynski@marvell.com (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers
Series add support for self monitoring |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Tomasz Duszynski Oct. 25, 2024, 8:54 a.m. UTC 
Add support for reading Intel x86_64 PMU events in runtime.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
---
 app/test/test_pmu.c          |  2 ++
 lib/pmu/meson.build          |  1 +
 lib/pmu/rte_pmu.h            |  2 ++
 lib/pmu/rte_pmu_pmc_x86_64.h | 24 ++++++++++++++++++++++++
 4 files changed, 29 insertions(+)
 create mode 100644 lib/pmu/rte_pmu_pmc_x86_64.h
diff mbox series

Patch

diff --git a/app/test/test_pmu.c b/app/test/test_pmu.c
index 0dc33eeccc..c6e798f52d 100644
--- a/app/test/test_pmu.c
+++ b/app/test/test_pmu.c
@@ -15,6 +15,8 @@  test_pmu_read(void)
 
 #if defined(RTE_ARCH_ARM64)
 	name = "cpu_cycles";
+#elif defined(RTE_ARCH_X86_64)
+	name = "cpu-cycles";
 #endif
 
 	if (name == NULL) {
diff --git a/lib/pmu/meson.build b/lib/pmu/meson.build
index 94619c63c2..5230ca3e69 100644
--- a/lib/pmu/meson.build
+++ b/lib/pmu/meson.build
@@ -12,6 +12,7 @@  sources = files('rte_pmu.c')
 
 indirect_headers += files(
         'rte_pmu_pmc_arm64.h',
+        'rte_pmu_pmc_x86_64.h',
 )
 
 if dpdk_conf.has('RTE_ARCH_ARM64')
diff --git a/lib/pmu/rte_pmu.h b/lib/pmu/rte_pmu.h
index 5c8e8b9705..85f9127911 100644
--- a/lib/pmu/rte_pmu.h
+++ b/lib/pmu/rte_pmu.h
@@ -31,6 +31,8 @@  extern "C" {
 
 #if defined(RTE_ARCH_ARM64)
 #include "rte_pmu_pmc_arm64.h"
+#elif defined(RTE_ARCH_X86_64)
+#include "rte_pmu_pmc_x86_64.h"
 #endif
 
 /** Maximum number of events in a group */
diff --git a/lib/pmu/rte_pmu_pmc_x86_64.h b/lib/pmu/rte_pmu_pmc_x86_64.h
new file mode 100644
index 0000000000..5eb8f73c11
--- /dev/null
+++ b/lib/pmu/rte_pmu_pmc_x86_64.h
@@ -0,0 +1,24 @@ 
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Marvell.
+ */
+#ifndef _RTE_PMU_PMC_X86_64_H_
+#define _RTE_PMU_PMC_X86_64_H_
+
+#include <rte_common.h>
+
+static __rte_always_inline uint64_t
+rte_pmu_pmc_read(int index)
+{
+	uint64_t low, high;
+
+	asm volatile(
+		"rdpmc\n"
+		: "=a" (low), "=d" (high)
+		: "c" (index)
+	);
+
+	return low | (high << 32);
+}
+#define rte_pmu_pmc_read rte_pmu_pmc_read
+
+#endif /* _RTE_PMU_PMC_X86_64_H_ */