From patchwork Fri Sep 20 13:09:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gowrishankar Muthukrishnan X-Patchwork-Id: 144361 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 096284599D; Fri, 20 Sep 2024 15:11:04 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E5BEA43440; Fri, 20 Sep 2024 15:11:03 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 0321243438 for ; Fri, 20 Sep 2024 15:11:00 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 48KCprDJ025726; Fri, 20 Sep 2024 06:10:57 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pfpt0220; bh=A G56k5EqFlwxV/fnS4oCNV+QCg3eOYM8pOm0yYiDypo=; b=YeTuA6Gf04peDLqID F6gmEwOOFNv48mJqaHVTwOYXIfqJ2EbKfm7tDvAGc8Hb4WjJlxbFGCP8CXa8vBUy 5+YOBM2jsbZ5Y7xi+AMX2xCjr1IDIBkdYz16Y04IkzME7barxAjQ7UwK1YxZWRj/ T0M3DcaGEQqcaFUD0WYdz825thUC7NVwKfkFzho8ezFkkzalKD9rjyh22rTt9DBL yezXjN/3OM86iN0UGKA+ZWEAG+qmch1Sx5O9xq/ME87JDjhJLLTu+WwS8gQoXJlL ljFY36nRZzmWkafuSE3/3KXESBCW9DcUTcFmZDpXCXS0Uqr97p0Pof8SGaiShXDp mE9cw== Received: from dc5-exch05.marvell.com ([199.233.59.128]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 41qdwgpp0n-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 20 Sep 2024 06:10:56 -0700 (PDT) Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Fri, 20 Sep 2024 06:10:55 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Fri, 20 Sep 2024 06:10:55 -0700 Received: from BG-LT91401.marvell.com (BG-LT91401.marvell.com [10.193.65.223]) by maili.marvell.com (Postfix) with ESMTP id 0FD045B6923; Fri, 20 Sep 2024 06:10:46 -0700 (PDT) From: Gowrishankar Muthukrishnan To: , Ankur Dwivedi , Anoob Joseph , Tejasree Kondoj , "Nithin Dabilpuram" , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Harman Kalra CC: , , , , , , , , , , , , , Akhil Goyal , "Gowrishankar Muthukrishnan" Subject: [PATCH v3 3/6] crypto/cnxk: support EDDSA Date: Fri, 20 Sep 2024 18:39:45 +0530 Message-ID: <20240920130950.1297-3-gmuthukrishn@marvell.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20240920130950.1297-1-gmuthukrishn@marvell.com> References: <20240905133933.741-3-gmuthukrishn@marvell.com> <20240920130950.1297-1-gmuthukrishn@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: NnnlRP_brL5fdFqW35Z2jRoRDOYIyue9 X-Proofpoint-ORIG-GUID: NnnlRP_brL5fdFqW35Z2jRoRDOYIyue9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Support EDDSA crypto algorithm in CNXK PMD. Signed-off-by: Gowrishankar Muthukrishnan --- doc/guides/cryptodevs/features/cn10k.ini | 1 + drivers/common/cnxk/hw/cpt.h | 3 +- drivers/common/cnxk/roc_ae.c | 52 +- drivers/common/cnxk/roc_ae.h | 10 + drivers/common/cnxk/roc_ae_fpm_tables.c | 580 +++++++++++++++++- drivers/crypto/cnxk/cnxk_ae.h | 473 +++++++++++++- drivers/crypto/cnxk/cnxk_cryptodev.h | 2 +- .../crypto/cnxk/cnxk_cryptodev_capabilities.c | 19 + 8 files changed, 1129 insertions(+), 11 deletions(-) diff --git a/doc/guides/cryptodevs/features/cn10k.ini b/doc/guides/cryptodevs/features/cn10k.ini index 39f4b56b9f..bb7d265005 100644 --- a/doc/guides/cryptodevs/features/cn10k.ini +++ b/doc/guides/cryptodevs/features/cn10k.ini @@ -107,6 +107,7 @@ ECDH = Y ECDSA = Y ECPM = Y SM2 = Y +EDDSA = Y ; ; Supported Operating systems of the 'cn10k' crypto driver. diff --git a/drivers/common/cnxk/hw/cpt.h b/drivers/common/cnxk/hw/cpt.h index 2620965606..47df3fbf9f 100644 --- a/drivers/common/cnxk/hw/cpt.h +++ b/drivers/common/cnxk/hw/cpt.h @@ -81,7 +81,8 @@ union cpt_eng_caps { uint64_t __io sm2 : 1; uint64_t __io pdcp_chain_zuc256 : 1; uint64_t __io tls : 1; - uint64_t __io reserved_39_63 : 25; + uint64_t __io eddsa : 1; + uint64_t __io reserved_40_63 : 24; }; }; diff --git a/drivers/common/cnxk/roc_ae.c b/drivers/common/cnxk/roc_ae.c index 7ef0efe2b3..2c563c30de 100644 --- a/drivers/common/cnxk/roc_ae.c +++ b/drivers/common/cnxk/roc_ae.c @@ -179,7 +179,57 @@ const struct roc_ae_ec_group ae_ec_grp[ROC_AE_EC_ID_PMAX] = { 0xAB, 0x8F, 0x92, 0xDD, 0xBC, 0xBD, 0x41, 0x4D, 0x94, 0x0E, 0x93}, .length = 32}, - }}; + }, + { + .prime = {.data = {0xed, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0x7F}, + .length = 32}, + .order = {.data = {0xed, 0xd3, 0xf5, 0x5c, 0x1a, 0x63, 0x12, + 0x58, 0xd6, 0x9c, 0xf7, 0xa2, 0xde, 0xf9, + 0xde, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x10}, + .length = 32}, + .consta = {.data = {0xa3, 0x78, 0x59, 0x13, 0xca, 0x4d, 0xeb, + 0x75, 0xab, 0xd8, 0x41, 0x41, 0x4d, 0x0a, + 0x70, 0x00, 0x98, 0xe8, 0x79, 0x77, 0x79, + 0x40, 0xc7, 0x8c, 0x73, 0xfe, 0x6f, 0x2b, + 0xee, 0x6c, 0x03, 0x52}, + .length = 32}, + }, + { + .prime = {.data = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .length = 56}, + .order = {.data = {0xf3, 0x44, 0x58, 0xab, 0x92, 0xc2, 0x78, + 0x23, 0x55, 0x8f, 0xc5, 0x8d, 0x72, 0xc2, + 0x6c, 0x21, 0x90, 0x36, 0xd6, 0xae, 0x49, + 0xdb, 0x4e, 0xc4, 0xe9, 0x23, 0xca, 0x7c, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f}, + .length = 56}, + .consta = {.data = {0x56, 0x67, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .length = 56}, + }, +}; int roc_ae_ec_grp_get(struct roc_ae_ec_group **tbl) diff --git a/drivers/common/cnxk/roc_ae.h b/drivers/common/cnxk/roc_ae.h index 7886b9d107..880ed5f75a 100644 --- a/drivers/common/cnxk/roc_ae.h +++ b/drivers/common/cnxk/roc_ae.h @@ -12,6 +12,7 @@ #define ROC_AE_MAJOR_OP_MODEX 0x03 #define ROC_AE_MAJOR_OP_EC 0x04 #define ROC_AE_MAJOR_OP_ECC 0x05 +#define ROC_AE_MAJOR_OP_EDDSA 0x0A #define ROC_AE_MINOR_OP_RANDOM 0x00 #define ROC_AE_MINOR_OP_MODEX 0x01 #define ROC_AE_MINOR_OP_PKCS_ENC 0x02 @@ -23,6 +24,9 @@ #define ROC_AE_MINOR_OP_EC_VERIFY 0x02 #define ROC_AE_MINOR_OP_ECC_UMP 0x03 #define ROC_AE_MINOR_OP_ECC_FPM 0x04 +#define ROC_AE_MINOR_OP_ED_SIGN 0x00 +#define ROC_AE_MINOR_OP_ED_VERIFY 0x01 +#define ROC_AE_MINOR_OP_ED_KEYGEN 0x02 /** * Enumeration roc_ae_ec_id @@ -39,6 +43,8 @@ typedef enum { ROC_AE_EC_ID_P320 = 6, ROC_AE_EC_ID_P512 = 7, ROC_AE_EC_ID_SM2 = 8, + ROC_AE_EC_ID_ED25519 = 9, + ROC_AE_EC_ID_ED448 = 10, ROC_AE_EC_ID_PMAX } roc_ae_ec_id; @@ -47,6 +53,10 @@ typedef enum { #define ROC_AE_EC_PARAM1_SM2 (1 << 7) #define ROC_AE_EC_PARAM1_NIST (0 << 6) #define ROC_AE_EC_PARAM1_NONNIST (1 << 6) +#define ROC_AE_ED_PARAM1_25519 (1 << 1) +#define ROC_AE_ED_PARAM1_448 (1 << 3) +#define ROC_AE_ED_PARAM1_KEYGEN_BIT 4 +#define ROC_AE_EC_PARAM1_PH_BIT 5 typedef enum { ROC_AE_ERR_ECC_PAI = 0x0b, diff --git a/drivers/common/cnxk/roc_ae_fpm_tables.c b/drivers/common/cnxk/roc_ae_fpm_tables.c index 942657b56a..0a5e8d0ec4 100644 --- a/drivers/common/cnxk/roc_ae_fpm_tables.c +++ b/drivers/common/cnxk/roc_ae_fpm_tables.c @@ -21,7 +21,9 @@ typedef enum { AE_FPM_P224_LEN = 2160, AE_FPM_P256_LEN = 2160, AE_FPM_P384_LEN = 2520, - AE_FPM_P521_LEN = 3240 + AE_FPM_P521_LEN = 3240, + AE_FPM_ED25519_LEN = 2880, + AE_FPM_ED448_LEN = 3840, } ae_fpm_len; /* FPM table address and length */ @@ -1240,6 +1242,572 @@ const uint8_t ae_fpm_tbl_p256_sm2[AE_FPM_P256_LEN] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, }; +const uint8_t ae_fpm_tbl_ed25519[AE_FPM_ED25519_LEN] = { + 0xc9, 0x56, 0x2d, 0x60, 0x8f, 0x25, 0xd5, 0x1a, 0x69, 0x2c, 0xc7, 0x60, + 0x95, 0x25, 0xa7, 0xb2, 0xc0, 0xa4, 0xe2, 0x31, 0xfd, 0xd6, 0xdc, 0x5c, + 0x21, 0x69, 0x36, 0xd3, 0xcd, 0x6e, 0x53, 0xfe, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x58, 0x66, 0x66, 0x66, 0x66, + 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, + 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x6d, 0xde, 0x8a, 0xb3, 0xa5, 0xb7, 0xdd, 0xa3, 0x20, 0xf0, 0x9f, 0x80, + 0x77, 0x51, 0x52, 0xf5, 0x66, 0xea, 0x4e, 0x8e, 0x64, 0xab, 0xe3, 0x7d, + 0x67, 0x87, 0x5f, 0x0f, 0xd7, 0x8b, 0x76, 0x65, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x18, 0xc0, 0x0c, 0x55, 0x07, 0xed, 0xf1, 0x0d, 0x69, 0xbe, 0x61, 0x3a, + 0x4f, 0x82, 0xd2, 0xc4, 0x3e, 0xf0, 0xa1, 0x4e, 0xf1, 0xba, 0xd8, 0xb1, + 0x5a, 0x8a, 0x5a, 0x58, 0xbe, 0xf1, 0x44, 0x74, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x63, 0xce, 0x54, 0x79, 0x0e, 0x45, 0x3f, 0x73, 0xe9, 0x33, 0xff, 0xc7, + 0xec, 0xab, 0xc7, 0x4b, 0x6b, 0x43, 0x64, 0x02, 0x45, 0xcf, 0x64, 0xfa, + 0x1a, 0xd2, 0xdd, 0x57, 0x64, 0x55, 0xf6, 0x78, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x05, 0x8c, 0x9d, 0x04, 0xac, 0x84, 0x05, 0xe0, 0xe7, 0xa5, 0x17, 0x56, + 0x92, 0x2e, 0xbd, 0x07, 0x96, 0x72, 0x74, 0xa7, 0xd8, 0x1d, 0x8d, 0x30, + 0x42, 0x4d, 0xa3, 0xd2, 0x15, 0xae, 0xf3, 0xb7, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x19, 0xcf, 0x23, 0xc1, 0x1f, 0x40, 0x15, 0x86, 0x4d, 0xd5, 0x99, 0x64, + 0x9b, 0x94, 0x9e, 0x8e, 0x22, 0x68, 0xc6, 0xcf, 0xf4, 0xe4, 0xf9, 0xd9, + 0x75, 0xe4, 0xce, 0xc7, 0xf1, 0xc8, 0x41, 0x7c, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x98, 0x8c, 0x87, 0x10, 0xcd, 0x87, 0x55, 0x95, 0x52, 0x83, 0xad, 0xc1, + 0x83, 0x92, 0xcf, 0xa4, 0x28, 0x4a, 0x93, 0xe5, 0x21, 0x53, 0xaa, 0x3d, + 0x33, 0x97, 0x60, 0xe6, 0xcb, 0xdc, 0xf5, 0xd4, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xe6, 0xf2, 0x50, 0x1e, 0x50, 0x14, 0x12, 0xd8, 0x45, 0xcc, 0xd0, 0xd4, + 0x75, 0x78, 0xec, 0xae, 0x42, 0x10, 0x45, 0x12, 0x74, 0x2b, 0x26, 0xde, + 0x41, 0xea, 0x80, 0x41, 0x7f, 0xb3, 0xf8, 0x67, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x46, 0x75, 0x61, 0x33, 0xad, 0x0c, 0x22, 0xe4, 0x7f, 0xd7, 0x18, 0xb3, + 0xf9, 0xd3, 0x55, 0x9e, 0x96, 0x2d, 0xa3, 0xfa, 0x7d, 0xfb, 0x1e, 0xb6, + 0x4e, 0xd0, 0xb6, 0x26, 0xa7, 0x32, 0x09, 0x87, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xaf, 0x7f, 0xd1, 0x3e, 0xfe, 0xa5, 0xa5, 0x96, 0x3c, 0x42, 0xec, 0x0e, + 0xef, 0x69, 0x4e, 0x62, 0xf5, 0xb9, 0xc2, 0xad, 0x65, 0x7b, 0x91, 0x6f, + 0x25, 0x55, 0x0a, 0xc3, 0x9c, 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0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xea, 0x95, 0x4b, 0x50, 0xb3, 0x76, 0xa6, 0xa4, 0xb1, 0x9a, 0x39, 0x1e, + 0x0d, 0x64, 0xfe, 0xc0, 0xf4, 0x43, 0xef, 0x85, 0x0a, 0xc2, 0xe3, 0xb0, + 0x58, 0xc3, 0xf0, 0xf8, 0xdb, 0x67, 0xfc, 0x36, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xba, 0x4f, 0xbc, 0x66, 0x32, 0xd4, 0x4e, 0xec, 0x3f, 0x92, 0xfb, 0x0e, + 0x92, 0x9b, 0x52, 0xe8, 0x27, 0xd9, 0xbb, 0xaa, 0x9c, 0x54, 0x70, 0x82, + 0x4f, 0xad, 0xca, 0xbc, 0x9e, 0x01, 0x7e, 0x1c, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x5e, 0xe3, 0x0c, 0xca, 0xa3, 0xaa, 0xd6, 0x3f, 0x90, 0xcc, 0xef, 0xcd, + 0x74, 0x59, 0xb3, 0xc5, 0xba, 0x35, 0xa8, 0x7e, 0x7e, 0xec, 0x4b, 0x6b, + 0x00, 0x21, 0xfb, 0xa1, 0x6e, 0x53, 0xc4, 0xed, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x9d, 0xd3, 0xb3, 0xeb, 0xcf, 0xa0, 0x6d, 0xb1, 0x88, 0xab, 0x33, 0xc4, + 0x0f, 0xd7, 0xb0, 0x76, 0x02, 0x8e, 0x71, 0x61, 0x18, 0x63, 0x07, 0xdc, + 0x3e, 0x0d, 0xb9, 0xa8, 0x32, 0x75, 0x7a, 0x3a, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x99, 0xab, 0xf5, 0x7e, 0x0b, 0x4c, 0x08, 0x30, 0x08, 0x80, 0xc1, 0x9b, + 0x69, 0x6a, 0x0e, 0xfc, 0x16, 0x81, 0xf1, 0xa9, 0xd4, 0x85, 0x35, 0x94, + 0x26, 0xc5, 0x23, 0xb4, 0xa8, 0xb1, 0x8a, 0xb8, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xc5, 0x6d, 0x50, 0x49, 0x27, 0x8d, 0x35, 0x47, 0x0d, 0x73, 0x18, 0xae, + 0xaf, 0x38, 0xef, 0xfa, 0xdd, 0x70, 0x48, 0x15, 0x39, 0xf0, 0x1c, 0x6e, + 0x79, 0xd1, 0x13, 0x9f, 0xe4, 0xb3, 0xb2, 0xb4, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x39, 0xeb, 0xfb, 0x14, 0x3f, 0xf0, 0xa0, 0x0b, 0x5e, 0x41, 0x20, 0x0c, + 0xfe, 0x36, 0x0c, 0x7f, 0xf0, 0xaf, 0xaa, 0xdd, 0x61, 0x66, 0x65, 0x30, + 0x6b, 0x10, 0x18, 0x28, 0x30, 0xb6, 0x47, 0x3e, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xf7, 0xa8, 0x12, 0x06, 0x64, 0xfa, 0x90, 0xfa, 0x0c, 0xfb, 0x26, 0xf2, + 0x2a, 0x1a, 0xc4, 0xf9, 0xae, 0x5c, 0x1b, 0x24, 0xf3, 0xf2, 0x87, 0xa2, + 0x5c, 0x0a, 0x2a, 0x2b, 0x17, 0xa7, 0x2b, 0x7e, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x99, 0x6d, 0x30, 0x7d, 0xb2, 0xd1, 0x40, 0xb7, 0x4f, 0x05, 0xac, 0x1a, + 0xa1, 0x66, 0xa6, 0x19, 0x18, 0xf8, 0xcd, 0xf3, 0x3c, 0xf6, 0x84, 0xc3, + 0x4d, 0x46, 0x49, 0xf1, 0xf7, 0x28, 0xa6, 0x0c, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x88, 0xf2, 0x0b, 0x90, 0x0d, 0xeb, 0x5c, 0x0b, 0x70, 0x2f, 0x54, 0x26, + 0x1a, 0x7d, 0x6e, 0x72, 0x67, 0x95, 0x28, 0x03, 0x01, 0x37, 0xfa, 0xc6, + 0x00, 0x45, 0xa7, 0xda, 0x5b, 0xbf, 0xf0, 0x24, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xa9, 0x6c, 0x1d, 0x2b, 0x7e, 0xea, 0x35, 0x8b, 0x92, 0x12, 0x42, 0xf9, + 0x8f, 0x67, 0x38, 0xf5, 0xf7, 0x1a, 0xe2, 0x8f, 0xb4, 0x40, 0x45, 0x2a, + 0x47, 0xca, 0x9d, 0xbf, 0xbd, 0x85, 0xc0, 0xd2, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +const uint8_t ae_fpm_tbl_ed448[AE_FPM_ED448_LEN] = { + 0x26, 0x26, 0xa8, 0x2b, 0xc7, 0x0c, 0xc0, 0x5e, 0x43, 0x3b, 0x80, 0xe1, + 0x8b, 0x00, 0x93, 0x8e, 0x12, 0xae, 0x1a, 0xf7, 0x2a, 0xb6, 0x65, 0x11, + 0xea, 0x6d, 0xe3, 0x24, 0xa3, 0xd3, 0xa4, 0x64, 0x9e, 0x14, 0x65, 0x70, + 0x47, 0x0f, 0x17, 0x67, 0x22, 0x1d, 0x15, 0xa6, 0x22, 0xbf, 0x36, 0xda, + 0x4f, 0x19, 0x70, 0xc6, 0x6b, 0xed, 0x0d, 0xed, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x98, 0x08, 0x79, 0x5b, 0xf2, 0x30, 0xfa, 0x14, + 0xfd, 0xbd, 0x13, 0x2c, 0x4e, 0xd7, 0xc8, 0xad, 0x3a, 0xd3, 0xff, 0x1c, + 0xe6, 0x7c, 0x39, 0xc4, 0x87, 0x78, 0x9c, 0x1e, 0x05, 0xa0, 0xc2, 0xd7, + 0x4b, 0xea, 0x73, 0x73, 0x6c, 0xa3, 0x98, 0x40, 0x88, 0x76, 0x20, 0x37, + 0x56, 0xc9, 0xc7, 0x62, 0x69, 0x3f, 0x46, 0x71, 0x6e, 0xb6, 0xbc, 0x24, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xeb, 0x06, 0x62, 0x4e, 0x82, 0xaf, 0x95, 0xf3, 0xf7, 0x8f, 0xa0, 0x7d, + 0x85, 0x66, 0x2d, 0x1d, 0xf1, 0x79, 0xde, 0x90, 0xb5, 0xb2, 0x7d, 0xa1, + 0x60, 0xd7, 0x16, 0x67, 0xe2, 0x35, 0x6d, 0x58, 0xc5, 0x05, 0x6a, 0x18, + 0x3f, 0x84, 0x51, 0xd2, 0xce, 0xc3, 0x9d, 0x2d, 0x50, 0x8d, 0x91, 0xc9, + 0xc7, 0x5e, 0xb5, 0x8a, 0xee, 0x22, 0x1c, 0x6c, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x12, 0x77, 0x1a, 0x0d, 0x31, 0xc0, 0x77, 0xbf, + 0xc4, 0x24, 0x04, 0xed, 0x68, 0x36, 0xd7, 0x42, 0x6a, 0x65, 0x11, 0x30, + 0x9d, 0xd9, 0x3a, 0x78, 0x3d, 0x16, 0x5b, 0x3f, 0x5b, 0x32, 0xdd, 0x27, + 0x70, 0xf9, 0x81, 0x8f, 0x1b, 0xc6, 0x4d, 0xd1, 0x36, 0xf5, 0xf8, 0x56, + 0x3e, 0x48, 0x3a, 0xc1, 0x28, 0x41, 0x27, 0x74, 0x35, 0xd1, 0x4b, 0x0f, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x51, 0x69, 0x81, 0x50, + 0x38, 0xfb, 0x26, 0xe1, 0x68, 0x82, 0xe5, 0x52, 0x90, 0x23, 0xc2, 0x5e, + 0xb3, 0x5e, 0x42, 0x06, 0x65, 0xea, 0x9f, 0x0c, 0x94, 0x4c, 0x92, 0x1f, + 0x2d, 0x18, 0x4c, 0x04, 0xbe, 0x79, 0xf0, 0x74, 0x2d, 0x5a, 0x0b, 0x29, + 0xa7, 0x46, 0xb8, 0x80, 0xdf, 0x83, 0x8f, 0x06, 0xe6, 0xe0, 0x8f, 0x72, + 0x53, 0xfa, 0x6d, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xb4, 0x85, 0xa6, 0xed, 0xe6, 0xa8, 0x12, 0xd5, 0x7d, 0x97, 0xf7, 0xc8, + 0xac, 0x2c, 0x4d, 0x2b, 0xfc, 0x53, 0x3e, 0xd0, 0x9f, 0x45, 0xd1, 0x52, + 0xac, 0x85, 0x4f, 0xf8, 0x36, 0x7c, 0xcd, 0xa6, 0x6c, 0xb8, 0x0f, 0x8f, + 0xdc, 0xde, 0x54, 0xc3, 0x23, 0x7b, 0xcc, 0xd9, 0xfe, 0x97, 0x19, 0x86, + 0xa6, 0x17, 0xcd, 0x9b, 0xfe, 0x08, 0xf6, 0x3f, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x5c, 0xeb, 0x54, 0x97, 0x02, 0x55, 0xed, 0x8f, + 0xfe, 0x3f, 0xe6, 0x24, 0x26, 0x1e, 0x3a, 0xc8, 0xdf, 0x28, 0xfc, 0xf9, + 0xb9, 0x1b, 0x9c, 0xc8, 0x1b, 0x5f, 0xb0, 0x08, 0x2b, 0x19, 0x1e, 0x92, + 0x29, 0xd9, 0x49, 0xa8, 0xb4, 0x61, 0xcc, 0xf3, 0x18, 0x35, 0x0a, 0x40, + 0x2a, 0xe3, 0x2c, 0x09, 0x21, 0x81, 0x22, 0x38, 0xaf, 0xc2, 0xf4, 0x20, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x93, 0x2d, 0x7c, 0xe2, + 0x41, 0xc3, 0x10, 0x65, 0x01, 0x4a, 0x4f, 0xd5, 0x07, 0x2b, 0xa5, 0xd6, + 0x7c, 0xc0, 0x57, 0x50, 0xc3, 0xf5, 0x63, 0xa0, 0x03, 0x8b, 0x79, 0xa9, + 0xb1, 0xdd, 0xc4, 0x2f, 0xbe, 0xfa, 0x48, 0x92, 0xca, 0x8e, 0xd7, 0x0d, + 0xdf, 0xcf, 0x2d, 0x40, 0xa3, 0xbc, 0x7e, 0xe7, 0x2e, 0xbe, 0xe9, 0x21, + 0x83, 0xc8, 0x79, 0x34, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xac, 0xdf, 0x2c, 0x05, 0x92, 0x8e, 0xe1, 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0x3e, 0xbf, 0xe7, 0x10, 0x81, 0xf1, 0x85, 0x40, 0xcb, 0x60, 0xf1, + 0xae, 0x1a, 0xba, 0xc5, 0xda, 0x60, 0x1c, 0x0f, 0x6d, 0x47, 0xfd, 0xa2, + 0x56, 0x13, 0x67, 0x02, 0x7c, 0xd9, 0xc5, 0x56, 0x32, 0x69, 0x12, 0xc7, + 0x8f, 0x2f, 0x31, 0x2c, 0x0f, 0xd2, 0x94, 0x69, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xfb, 0x14, 0x20, 0x93, 0x21, 0xb2, 0x35, 0xf1, + 0x80, 0x14, 0x8e, 0xf1, 0x0c, 0x28, 0x62, 0x8d, 0xb8, 0xcf, 0x6c, 0x9e, + 0xf6, 0xdb, 0x18, 0x16, 0x0b, 0xbd, 0xe9, 0xb4, 0xa3, 0x75, 0xee, 0xb2, + 0x55, 0x1e, 0x4c, 0xc7, 0xa7, 0x74, 0xe8, 0x0e, 0x8f, 0xb7, 0xa8, 0x04, + 0xf3, 0xeb, 0x1c, 0x35, 0xd6, 0x1d, 0x1b, 0x2a, 0x51, 0x10, 0xa2, 0x67, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xd4, 0x1c, 0x40, 0x29, + 0xfa, 0x43, 0x18, 0x0c, 0x4c, 0xc0, 0xcd, 0x55, 0x99, 0xd0, 0xb9, 0xb4, + 0x55, 0x69, 0x7d, 0xad, 0x99, 0xb8, 0xec, 0x62, 0x0c, 0x3b, 0x71, 0x11, + 0xf0, 0xba, 0x59, 0x19, 0x93, 0xef, 0xcd, 0x2c, 0x29, 0x02, 0x8b, 0x76, + 0x85, 0x21, 0xc1, 0xad, 0x72, 0x67, 0x87, 0xd1, 0x8f, 0xc6, 0x05, 0xe7, + 0x82, 0x4e, 0x95, 0xd5, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + const struct ae_fpm_entry ae_fpm_tbl_scalar[ROC_AE_EC_ID_PMAX] = { { .data = ae_fpm_tbl_p192, @@ -1267,7 +1835,15 @@ const struct ae_fpm_entry ae_fpm_tbl_scalar[ROC_AE_EC_ID_PMAX] = { { .data = ae_fpm_tbl_p256_sm2, .len = sizeof(ae_fpm_tbl_p256_sm2) - } + }, + { + .data = ae_fpm_tbl_ed25519, + .len = sizeof(ae_fpm_tbl_ed25519) + }, + { + .data = ae_fpm_tbl_ed448, + .len = sizeof(ae_fpm_tbl_ed448) + }, }; int diff --git a/drivers/crypto/cnxk/cnxk_ae.h b/drivers/crypto/cnxk/cnxk_ae.h index ef9cb5eb91..431d66c535 100644 --- a/drivers/crypto/cnxk/cnxk_ae.h +++ b/drivers/crypto/cnxk/cnxk_ae.h @@ -205,6 +205,12 @@ cnxk_ae_fill_ec_params(struct cnxk_ae_sess *sess, case RTE_CRYPTO_EC_GROUP_SM2: ec->curveid = ROC_AE_EC_ID_SM2; break; + case RTE_CRYPTO_EC_GROUP_ED25519: + ec->curveid = ROC_AE_EC_ID_ED25519; + break; + case RTE_CRYPTO_EC_GROUP_ED448: + ec->curveid = ROC_AE_EC_ID_ED448; + break; default: /* Only NIST curves (FIPS 186-4) and SM2 are supported */ return -EINVAL; @@ -225,6 +231,12 @@ cnxk_ae_fill_ec_params(struct cnxk_ae_sess *sess, if (ec->q.x.length) rte_memcpy(ec->q.x.data, xform->ec.q.x.data, ec->q.x.length); + /* Use q.x to store compressed public key. q.y is set to 0 */ + if (xform->xform_type == RTE_CRYPTO_ASYM_XFORM_EDDSA) { + ec->q.y.length = 0; + return 0; + } + ec->q.y.length = xform->ec.q.y.length; if (ec->q.y.length > ROC_AE_EC_DATA_MAX) ec->q.y.length = ROC_AE_EC_DATA_MAX; @@ -255,6 +267,7 @@ cnxk_ae_fill_session_parameters(struct cnxk_ae_sess *sess, case RTE_CRYPTO_ASYM_XFORM_ECPM: case RTE_CRYPTO_ASYM_XFORM_ECFPM: case RTE_CRYPTO_ASYM_XFORM_SM2: + case RTE_CRYPTO_ASYM_XFORM_EDDSA: ret = cnxk_ae_fill_ec_params(sess, xform); break; default: @@ -736,6 +749,330 @@ cnxk_ae_enqueue_ecdsa_op(struct rte_crypto_op *op, return 0; } +static __rte_always_inline void +cnxk_ae_eddsa_sign_prep(struct rte_crypto_eddsa_op_param *eddsa, + struct roc_ae_buf_ptr *meta_buf, + uint64_t fpm_table_iova, struct roc_ae_ec_group *ec_grp, + struct cnxk_ae_sess *sess, struct cpt_inst_s *inst) +{ + const uint8_t iv_sha512[] = { + 0x6a, 0x09, 0xe6, 0x67, 0xf3, 0xbc, 0xc9, 0x08, + 0xbb, 0x67, 0xae, 0x85, 0x84, 0xca, 0xa7, 0x3b, + 0x3c, 0x6e, 0xf3, 0x72, 0xfe, 0x94, 0xf8, 0x2b, + 0xa5, 0x4f, 0xf5, 0x3a, 0x5f, 0x1d, 0x36, 0xf1, + 0x51, 0x0e, 0x52, 0x7f, 0xad, 0xe6, 0x82, 0xd1, + 0x9b, 0x05, 0x68, 0x8c, 0x2b, 0x3e, 0x6c, 0x1f, + 0x1f, 0x83, 0xd9, 0xab, 0xfb, 0x41, 0xbd, 0x6b, + 0x5b, 0xe0, 0xcd, 0x19, 0x13, 0x7e, 0x21, 0x79}; + const uint8_t domx_ed25519[] = { + 0x53, 0x69, 0x67, 0x45, 0x64, 0x32, 0x35, 0x35, + 0x31, 0x39, 0x20, 0x6E, 0x6F, 0x20, 0x45, 0x64, + 0x32, 0x35, 0x35, 0x31, 0x39, 0x20, 0x63, 0x6F, + 0x6C, 0x6C, 0x69, 0x73, 0x69, 0x6F, 0x6E, 0x73, + 0x00, 0x00}; + const uint8_t domx_ed448[] = { + 0x53, 0x69, 0x67, 0x45, 0x64, 0x34, 0x34, 0x38, + 0x00, 0x00}; + + uint16_t pubkey_len = sess->ec_ctx.q.x.length; + uint16_t message_len = eddsa->message.length; + uint16_t pkey_len = sess->ec_ctx.pkey.length; + uint8_t curveid = sess->ec_ctx.curveid; + const uint8_t *domx_ptr = NULL; + uint16_t order_len, prime_len; + uint16_t ctx_align, k_align; + uint16_t prime_bit, iv_len; + uint8_t pub = 0, ph = 0; + uint64_t message_handle; + union cpt_inst_w4 w4; + uint8_t domx_len = 0; + uint8_t ctx_len = 0; + uint64_t ctrl = 0; + uint16_t dlen; + uint8_t *dptr; + + if (eddsa->instance == RTE_CRYPTO_EDCURVE_25519PH || + eddsa->instance == RTE_CRYPTO_EDCURVE_448PH) + ph = 1; + + if (curveid == ROC_AE_EC_ID_ED25519) { + prime_bit = ROC_AE_ED_PARAM1_25519; + iv_len = sizeof(iv_sha512); + } else { + prime_bit = ROC_AE_ED_PARAM1_448; + iv_len = 0; + } + + prime_len = ec_grp->prime.length; + order_len = ec_grp->order.length; + ctx_len = eddsa->context.length; + + if (curveid == ROC_AE_EC_ID_ED25519) { + if (ph || ctx_len) { + domx_ptr = domx_ed25519; + domx_len = sizeof(domx_ed25519); + } + } else { + domx_ptr = domx_ed448; + domx_len = sizeof(domx_ed448); + } + + if (pubkey_len) + pub = 1; + + ctx_align = RTE_ALIGN_CEIL(ctx_len + domx_len, 8); + k_align = RTE_ALIGN_CEIL(pkey_len, 8); + + /* Set control word */ + ctrl |= message_len; + ctrl |= (ctx_len + domx_len) << 16; + + /* Copy message and set message handle in metabuf */ + dptr = meta_buf->vaddr; + rte_memcpy(dptr, eddsa->message.data, message_len); + message_handle = (uint64_t)dptr; + dptr += RTE_ALIGN_CEIL(message_len, 8); + + /* Input buffer */ + inst->dptr = (uintptr_t)dptr; + + /* + * Set dlen = sum(sizeof(fpm address), input handle, ctrl, + * ROUNDUP8(prime len, order len, constant), ROUNDUP8(priv and + * pubkey len), ROUNDUP8(context len) and iv len (if ED25519)). + */ + dlen = sizeof(fpm_table_iova) + sizeof(message_handle) + + sizeof(ctrl) + prime_len * 3 + k_align * 2 + + ctx_align + iv_len; + + memset(dptr, 0, dlen); + + *(uint64_t *)dptr = fpm_table_iova; + dptr += sizeof(fpm_table_iova); + + *(uint64_t *)dptr = rte_cpu_to_be_64(message_handle); + dptr += sizeof(message_handle); + + *(uint64_t *)dptr = rte_cpu_to_be_64(ctrl); + dptr += sizeof(ctrl); + + memcpy(dptr, ec_grp->prime.data, prime_len); + dptr += prime_len; + + memcpy(dptr, ec_grp->order.data, order_len); + dptr += prime_len; + + memcpy(dptr, ec_grp->consta.data, prime_len); + dptr += prime_len; + + memcpy(dptr, sess->ec_ctx.pkey.data, pkey_len); + dptr += k_align; + + memcpy(dptr, sess->ec_ctx.q.x.data, pubkey_len); + dptr += k_align; + + memcpy(dptr, domx_ptr, domx_len); + if (eddsa->instance != RTE_CRYPTO_EDCURVE_25519) { + memset(dptr + (domx_len - 1), ctx_len, 1); + memset(dptr + (domx_len - 2), ph, 1); + } + + memcpy(dptr + domx_len, eddsa->context.data, ctx_len); + dptr += ctx_align; + + if (curveid == ROC_AE_EC_ID_ED25519) { + memcpy(dptr, iv_sha512, iv_len); + dptr += iv_len; + } + + /* Setup opcodes */ + w4.s.opcode_major = ROC_AE_MAJOR_OP_EDDSA; + w4.s.opcode_minor = ROC_AE_MINOR_OP_ED_SIGN; + + w4.s.param1 = prime_bit | + (pub << ROC_AE_ED_PARAM1_KEYGEN_BIT) | + (ph << ROC_AE_EC_PARAM1_PH_BIT); + w4.s.param2 = 0; + w4.s.dlen = dlen; + + inst->w4.u64 = w4.u64; + inst->rptr = (uintptr_t)dptr; +} + +static __rte_always_inline void +cnxk_ae_eddsa_verify_prep(struct rte_crypto_eddsa_op_param *eddsa, + struct roc_ae_buf_ptr *meta_buf, + uint64_t fpm_table_iova, + struct roc_ae_ec_group *ec_grp, struct cnxk_ae_sess *sess, + struct cpt_inst_s *inst) +{ + const uint8_t iv_sha512[] = { + 0x6a, 0x09, 0xe6, 0x67, 0xf3, 0xbc, 0xc9, 0x08, + 0xbb, 0x67, 0xae, 0x85, 0x84, 0xca, 0xa7, 0x3b, + 0x3c, 0x6e, 0xf3, 0x72, 0xfe, 0x94, 0xf8, 0x2b, + 0xa5, 0x4f, 0xf5, 0x3a, 0x5f, 0x1d, 0x36, 0xf1, + 0x51, 0x0e, 0x52, 0x7f, 0xad, 0xe6, 0x82, 0xd1, + 0x9b, 0x05, 0x68, 0x8c, 0x2b, 0x3e, 0x6c, 0x1f, + 0x1f, 0x83, 0xd9, 0xab, 0xfb, 0x41, 0xbd, 0x6b, + 0x5b, 0xe0, 0xcd, 0x19, 0x13, 0x7e, 0x21, 0x79}; + const uint8_t domx_ed25519[] = { + 0x53, 0x69, 0x67, 0x45, 0x64, 0x32, 0x35, 0x35, + 0x31, 0x39, 0x20, 0x6E, 0x6F, 0x20, 0x45, 0x64, + 0x32, 0x35, 0x35, 0x31, 0x39, 0x20, 0x63, 0x6F, + 0x6C, 0x6C, 0x69, 0x73, 0x69, 0x6F, 0x6E, 0x73, + 0x00, 0x00}; + const uint8_t domx_ed448[] = { + 0x53, 0x69, 0x67, 0x45, 0x64, 0x34, 0x34, 0x38, + 0x00, 0x00}; + + uint16_t pubkey_len = sess->ec_ctx.q.x.length; + uint16_t message_len = eddsa->message.length; + uint16_t s_len = eddsa->sign.length / 2; + uint8_t curveid = sess->ec_ctx.curveid; + uint16_t ctx_align, k_align, s_align; + const uint8_t *domx_ptr = NULL; + uint16_t order_len, prime_len; + uint16_t prime_bit, iv_len; + uint64_t message_handle; + union cpt_inst_w4 w4; + uint8_t domx_len = 0; + uint8_t ctx_len = 0; + uint64_t ctrl = 0; + uint8_t ph = 0; + uint16_t dlen; + uint8_t *dptr; + + if (eddsa->instance == RTE_CRYPTO_EDCURVE_25519PH || + eddsa->instance == RTE_CRYPTO_EDCURVE_448PH) + ph = 1; + + if (curveid == ROC_AE_EC_ID_ED25519) { + prime_bit = ROC_AE_ED_PARAM1_25519; + iv_len = sizeof(iv_sha512); + } else { + prime_bit = ROC_AE_ED_PARAM1_448; + iv_len = 0; + } + + prime_len = ec_grp->prime.length; + order_len = ec_grp->order.length; + ctx_len = eddsa->context.length; + + if (curveid == ROC_AE_EC_ID_ED25519) { + if (ph || ctx_len) { + domx_ptr = domx_ed25519; + domx_len = sizeof(domx_ed25519); + } + } else { + domx_ptr = domx_ed448; + domx_len = sizeof(domx_ed448); + } + + ctx_align = RTE_ALIGN_CEIL(ctx_len + domx_len, 8); + k_align = RTE_ALIGN_CEIL(pubkey_len, 8); + s_align = RTE_ALIGN_CEIL(s_len, 8); + + /* Set control word */ + ctrl |= message_len; + ctrl |= (ctx_len + domx_len) << 16; + + /* Copy message and set message handle in metabuf */ + dptr = meta_buf->vaddr; + rte_memcpy(dptr, eddsa->message.data, message_len); + message_handle = (uint64_t)dptr; + dptr += RTE_ALIGN_CEIL(message_len, 8); + + /* Input buffer */ + inst->dptr = (uintptr_t)dptr; + + /* + * Set dlen = sum(sizeof(fpm address), input handle, ctrl, + * ROUNDUP8(prime len, order len, constant), ROUNDUP8(pub key len), + * ROUNDUP8(s and r len), context and iv len (if ED25519)). + */ + dlen = sizeof(fpm_table_iova) + sizeof(message_handle) + + sizeof(ctrl) + prime_len * 3 + k_align + s_align * 2 + + ctx_align + iv_len; + + memset(dptr, 0, dlen); + + *(uint64_t *)dptr = fpm_table_iova; + dptr += sizeof(fpm_table_iova); + + *(uint64_t *)dptr = rte_cpu_to_be_64(message_handle); + dptr += sizeof(message_handle); + + *(uint64_t *)dptr = rte_cpu_to_be_64(ctrl); + dptr += sizeof(ctrl); + + memcpy(dptr, ec_grp->prime.data, prime_len); + dptr += prime_len; + + memcpy(dptr, ec_grp->order.data, order_len); + dptr += prime_len; + + memcpy(dptr, ec_grp->consta.data, prime_len); + dptr += prime_len; + + memcpy(dptr, sess->ec_ctx.q.x.data, pubkey_len); + dptr += k_align; + + memcpy(dptr, eddsa->sign.data, s_len); + dptr += s_align; + + memcpy(dptr, eddsa->sign.data + s_len, s_len); + dptr += s_align; + + memcpy(dptr, domx_ptr, domx_len); + if (eddsa->instance != RTE_CRYPTO_EDCURVE_25519) { + memset(dptr + (domx_len - 1), ctx_len, 1); + memset(dptr + (domx_len - 2), ph, 1); + } + + memcpy(dptr + domx_len, eddsa->context.data, ctx_len); + dptr += ctx_align; + + if (curveid == ROC_AE_EC_ID_ED25519) { + memcpy(dptr, iv_sha512, iv_len); + dptr += iv_len; + } + + /* Setup opcodes */ + w4.s.opcode_major = ROC_AE_MAJOR_OP_EDDSA; + w4.s.opcode_minor = ROC_AE_MINOR_OP_ED_VERIFY; + + w4.s.param1 = prime_bit | + (ph << ROC_AE_EC_PARAM1_PH_BIT); + w4.s.param2 = 0; + w4.s.dlen = dlen; + + inst->w4.u64 = w4.u64; + inst->rptr = (uintptr_t)dptr; +} + +static __rte_always_inline int __rte_hot +cnxk_ae_enqueue_eddsa_op(struct rte_crypto_op *op, + struct roc_ae_buf_ptr *meta_buf, + struct cnxk_ae_sess *sess, uint64_t *fpm_iova, + struct roc_ae_ec_group **ec_grp, + struct cpt_inst_s *inst) +{ + struct rte_crypto_eddsa_op_param *eddsa = &op->asym->eddsa; + uint8_t curveid = sess->ec_ctx.curveid; + + if (eddsa->op_type == RTE_CRYPTO_ASYM_OP_SIGN) + cnxk_ae_eddsa_sign_prep(eddsa, meta_buf, fpm_iova[curveid], + ec_grp[curveid], sess, inst); + else if (eddsa->op_type == RTE_CRYPTO_ASYM_OP_VERIFY) + cnxk_ae_eddsa_verify_prep(eddsa, meta_buf, fpm_iova[curveid], + ec_grp[curveid], sess, inst); + else { + op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS; + return -EINVAL; + } + return 0; +} + static __rte_always_inline void cnxk_ae_sm2_sign_prep(struct rte_crypto_sm2_op_param *sm2, struct roc_ae_buf_ptr *meta_buf, @@ -1004,6 +1341,88 @@ cnxk_ae_ecfpm_prep(rte_crypto_param *scalar, return 0; } +static __rte_always_inline int +cnxk_ae_edfpm_prep(rte_crypto_param *scalar, + struct roc_ae_buf_ptr *meta_buf, uint64_t *fpm_iova, + struct roc_ae_ec_group *ec_grp, uint8_t curveid, + struct cpt_inst_s *inst) +{ + const uint8_t iv_sha512[] = { + 0x6a, 0x09, 0xe6, 0x67, 0xf3, 0xbc, 0xc9, 0x08, + 0xbb, 0x67, 0xae, 0x85, 0x84, 0xca, 0xa7, 0x3b, + 0x3c, 0x6e, 0xf3, 0x72, 0xfe, 0x94, 0xf8, 0x2b, + 0xa5, 0x4f, 0xf5, 0x3a, 0x5f, 0x1d, 0x36, 0xf1, + 0x51, 0x0e, 0x52, 0x7f, 0xad, 0xe6, 0x82, 0xd1, + 0x9b, 0x05, 0x68, 0x8c, 0x2b, 0x3e, 0x6c, 0x1f, + 0x1f, 0x83, 0xd9, 0xab, 0xfb, 0x41, 0xbd, 0x6b, + 0x5b, 0xe0, 0xcd, 0x19, 0x13, 0x7e, 0x21, 0x79}; + uint16_t dlen, prime_len, order_len, iv_len; + uint16_t scalar_align, p_align, o_offset; + uint64_t fpm_table_iova; + union cpt_inst_w4 w4; + uint16_t prime_bit; + uint8_t *dptr; + + if (curveid == ROC_AE_EC_ID_ED25519) { + prime_bit = ROC_AE_ED_PARAM1_25519; + iv_len = sizeof(iv_sha512); + } else { + prime_bit = ROC_AE_ED_PARAM1_448; + iv_len = 0; + } + + prime_len = ec_grp->prime.length; + order_len = ec_grp->order.length; + fpm_table_iova = (uint64_t)fpm_iova[curveid]; + + /* Input buffer */ + dptr = meta_buf->vaddr; + inst->dptr = (uintptr_t)dptr; + + p_align = RTE_ALIGN_CEIL(prime_len, 8); + scalar_align = RTE_ALIGN_CEIL(scalar->length, 8); + + /* Set write offset for order and key */ + o_offset = p_align - order_len; + + /* + * Set dlen = sum(sizeof(fpm address), ROUNDUP8(prime len, order len, constant, + * private key len and iv len (if ED25519))). + */ + dlen = sizeof(fpm_table_iova) + 3 * p_align + scalar_align + iv_len; + + memset(dptr, 0, dlen); + + *(uint64_t *)dptr = fpm_table_iova; + dptr += sizeof(fpm_table_iova); + + memcpy(dptr, ec_grp->prime.data, prime_len); + dptr += p_align; + memcpy(dptr + o_offset, ec_grp->order.data, order_len); + dptr += p_align; + memcpy(dptr, ec_grp->consta.data, prime_len); + dptr += p_align; + memcpy(dptr, scalar->data, scalar->length); + dptr += scalar_align; + if (curveid == ROC_AE_EC_ID_ED25519) { + memcpy(dptr, iv_sha512, sizeof(iv_sha512)); + dptr += iv_len; + } + + /* Setup opcodes */ + w4.s.opcode_major = ROC_AE_MAJOR_OP_EDDSA; + w4.s.opcode_minor = ROC_AE_MINOR_OP_ED_KEYGEN; + + w4.s.param1 = prime_bit; + w4.s.param2 = 0; + w4.s.dlen = dlen; + + inst->w4.u64 = w4.u64; + inst->rptr = (uintptr_t)dptr; + + return 0; +} + static __rte_always_inline int cnxk_ae_ecpm_prep(rte_crypto_param *scalar, struct rte_crypto_ec_point *p, struct roc_ae_buf_ptr *meta_buf, @@ -1112,8 +1531,12 @@ cnxk_ae_enqueue_ecdh_op(struct rte_crypto_op *op, case RTE_CRYPTO_ASYM_KE_PUB_KEY_GENERATE: scalar.data = sess->ec_ctx.pkey.data; scalar.length = sess->ec_ctx.pkey.length; - cnxk_ae_ecfpm_prep(&scalar, meta_buf, fpm_iova, ec_grp[curveid], - curveid, inst); + if (curveid == ROC_AE_EC_ID_ED25519 || curveid == ROC_AE_EC_ID_ED448) + cnxk_ae_edfpm_prep(&scalar, meta_buf, fpm_iova, ec_grp[curveid], + curveid, inst); + else + cnxk_ae_ecfpm_prep(&scalar, meta_buf, fpm_iova, ec_grp[curveid], + curveid, inst); break; case RTE_CRYPTO_ASYM_KE_PUB_KEY_VERIFY: scalar.data = ec_grp[curveid]->order.data; @@ -1212,6 +1635,30 @@ cnxk_ae_dequeue_ecdsa_op(struct rte_crypto_ecdsa_op_param *ecdsa, uint8_t *rptr, ecdsa->s.length = prime_len; } +static __rte_always_inline void +cnxk_ae_dequeue_eddsa_op(struct rte_crypto_eddsa_op_param *eddsa, uint8_t *rptr, + struct roc_ae_ec_ctx *ec, + struct roc_ae_ec_group **ec_grp) +{ + RTE_SET_USED(ec); + RTE_SET_USED(ec_grp); + + if (eddsa->op_type == RTE_CRYPTO_ASYM_OP_VERIFY) + return; + + /* Separate out sign r and s components */ + if (eddsa->instance == RTE_CRYPTO_EDCURVE_25519 || + eddsa->instance == RTE_CRYPTO_EDCURVE_25519CTX || + eddsa->instance == RTE_CRYPTO_EDCURVE_25519PH) { + eddsa->sign.length = 64; + rte_memcpy(eddsa->sign.data, rptr, eddsa->sign.length); + } else { + eddsa->sign.length = 114; + rte_memcpy(eddsa->sign.data, rptr, 57); + rte_memcpy(eddsa->sign.data + 57, rptr + 64, 57); + } +} + static __rte_always_inline void cnxk_ae_dequeue_sm2_op(struct rte_crypto_sm2_op_param *sm2, uint8_t *rptr, struct roc_ae_ec_ctx *ec, @@ -1245,7 +1692,7 @@ cnxk_ae_dequeue_ecpm_op(struct rte_crypto_ecpm_op_param *ecpm, uint8_t *rptr, static __rte_always_inline void cnxk_ae_dequeue_ecdh_op(struct rte_crypto_ecdh_op_param *ecdh, uint8_t *rptr, struct roc_ae_ec_ctx *ec, - struct roc_ae_ec_group **ec_grp) + struct roc_ae_ec_group **ec_grp, uint16_t flags) { int prime_len = ec_grp[ec->curveid]->prime.length; @@ -1256,9 +1703,12 @@ cnxk_ae_dequeue_ecdh_op(struct rte_crypto_ecdh_op_param *ecdh, uint8_t *rptr, break; case RTE_CRYPTO_ASYM_KE_PUB_KEY_GENERATE: memcpy(ecdh->pub_key.x.data, rptr, prime_len); - memcpy(ecdh->pub_key.y.data, rptr + RTE_ALIGN_CEIL(prime_len, 8), prime_len); ecdh->pub_key.x.length = prime_len; - ecdh->pub_key.y.length = prime_len; + if (!(flags & RTE_CRYPTO_ASYM_FLAG_PUB_KEY_COMPRESSED)) { + memcpy(ecdh->pub_key.y.data, rptr + RTE_ALIGN_CEIL(prime_len, 8), + prime_len); + ecdh->pub_key.y.length = prime_len; + } break; case RTE_CRYPTO_ASYM_KE_PUB_KEY_VERIFY: break; @@ -1328,6 +1778,13 @@ cnxk_ae_enqueue(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op, if (unlikely(ret)) goto req_fail; break; + case RTE_CRYPTO_ASYM_XFORM_EDDSA: + ret = cnxk_ae_enqueue_eddsa_op(op, &meta_buf, sess, + sess->cnxk_fpm_iova, + sess->ec_grp, inst); + if (unlikely(ret)) + goto req_fail; + break; case RTE_CRYPTO_ASYM_XFORM_SM2: ret = cnxk_ae_enqueue_sm2_op(op, &meta_buf, sess, sess->cnxk_fpm_iova, @@ -1390,6 +1847,10 @@ cnxk_ae_post_process(struct rte_crypto_op *cop, struct cnxk_ae_sess *sess, cnxk_ae_dequeue_ecdsa_op(&op->ecdsa, rptr, &sess->ec_ctx, sess->ec_grp); break; + case RTE_CRYPTO_ASYM_XFORM_EDDSA: + cnxk_ae_dequeue_eddsa_op(&op->eddsa, rptr, &sess->ec_ctx, + sess->ec_grp); + break; case RTE_CRYPTO_ASYM_XFORM_SM2: cnxk_ae_dequeue_sm2_op(&op->sm2, rptr, &sess->ec_ctx, sess->ec_grp); @@ -1401,7 +1862,7 @@ cnxk_ae_post_process(struct rte_crypto_op *cop, struct cnxk_ae_sess *sess, break; case RTE_CRYPTO_ASYM_XFORM_ECDH: cnxk_ae_dequeue_ecdh_op(&op->ecdh, rptr, &sess->ec_ctx, - sess->ec_grp); + sess->ec_grp, op->flags); break; default: cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS; diff --git a/drivers/crypto/cnxk/cnxk_cryptodev.h b/drivers/crypto/cnxk/cnxk_cryptodev.h index 4000e84a7e..5cec64c2e1 100644 --- a/drivers/crypto/cnxk/cnxk_cryptodev.h +++ b/drivers/crypto/cnxk/cnxk_cryptodev.h @@ -11,7 +11,7 @@ #include "roc_ae.h" #include "roc_cpt.h" -#define CNXK_CPT_MAX_CAPS 55 +#define CNXK_CPT_MAX_CAPS 56 #define CNXK_SEC_IPSEC_CRYPTO_MAX_CAPS 16 #define CNXK_SEC_TLS_1_3_CRYPTO_MAX_CAPS 3 #define CNXK_SEC_TLS_1_2_CRYPTO_MAX_CAPS 7 diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c index 0d5d64b6e7..3897feacb8 100644 --- a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c +++ b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c @@ -1201,6 +1201,22 @@ static const struct rte_cryptodev_capabilities caps_sm2[] = { } }; +static const struct rte_cryptodev_capabilities caps_eddsa[] = { + { /* EDDSA */ + .op = RTE_CRYPTO_OP_TYPE_ASYMMETRIC, + {.asym = { + .xform_capa = { + .xform_type = RTE_CRYPTO_ASYM_XFORM_EDDSA, + .hash_algos = (1 << RTE_CRYPTO_AUTH_SHA512 | + 1 << RTE_CRYPTO_AUTH_SHAKE_256), + .op_types = ((1 << RTE_CRYPTO_ASYM_OP_SIGN) | + (1 << RTE_CRYPTO_ASYM_OP_VERIFY)) + } + } + } + } +}; + static const struct rte_cryptodev_capabilities caps_end[] = { RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST() }; @@ -1940,6 +1956,9 @@ cn10k_crypto_caps_add(struct rte_cryptodev_capabilities cnxk_caps[], if (hw_caps[CPT_ENG_TYPE_AE].sm2) CPT_CAPS_ADD(cnxk_caps, cur_pos, hw_caps, sm2); + + if (hw_caps[CPT_ENG_TYPE_AE].eddsa) + CPT_CAPS_ADD(cnxk_caps, cur_pos, hw_caps, eddsa); } static void