diff mbox series

[01/33] mempool/cnxk: add cn20k PCI device ids

Message ID	20240910085909.1514457-2-ndabilpuram@marvell.com (mailing list archive)
State	Changes Requested
Delegated to:	Jerin Jacob
Headers	From: Nithin Dabilpuram <ndabilpuram@marvell.com> To: <jerinj@marvell.com>, Ashwin Sekhar T K <asekhar@marvell.com>, "Pavan Nikhilesh" <pbhagavatula@marvell.com> CC: <dev@dpdk.org> Subject: [PATCH 01/33] mempool/cnxk: add cn20k PCI device ids Date: Tue, 10 Sep 2024 14:28:37 +0530 Message-ID: <20240910085909.1514457-2-ndabilpuram@marvell.com> In-Reply-To: <20240910085909.1514457-1-ndabilpuram@marvell.com> References: <20240910085909.1514457-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Precedence: list Errors-To: dev-bounces@dpdk.org
Series	add Marvell cn20k SOC support for mempool and net \| [00/33] add Marvell cn20k SOC support for mempool and net [01/33] mempool/cnxk: add cn20k PCI device ids [02/33] common/cnxk: accommodate change in aura field width [03/33] common/cnxk: use new NPA aq enq mbox for cn20k [04/33] mempool/cnxk: initialize mempool ops for cn20k [05/33] net/cnxk: added telemetry support do dump SA information [06/33] net/cnxk: handle timestamp correctly for VF [07/33] net/cnxk: update Rx offloads to handle timestamp [08/33] event/cnxk: handle timestamp for event mode [09/33] net/cnxk: update mbuf and rearm data for Rx inject packets [10/33] common/cnxk: remove restriction to clear RPM stats [11/33] common/cnxk: allow MAC address set/add with active VFs [12/33] net/cnxk: move PMD function defines to common code [13/33] common/cnxk: add cn20k NIX register definitions [14/33] common/cnxk: support NIX queue config for cn20k [15/33] common/cnxk: support bandwidth profile for cn20k [16/33] common/cnxk: support NIX debug for cn20k [17/33] common/cnxk: add RSS support for cn20k [18/33] net/cnxk: add cn20k base control path support [19/33] net/cnxk: support Rx function select for cn20k [20/33] net/cnxk: support Tx function select for cn20k [21/33] net/cnxk: support Rx burst scalar for cn20k [22/33] net/cnxk: support Rx burst vector for cn20k [23/33] net/cnxk: support Tx burst scalar for cn20k [24/33] net/cnxk: support Tx multi-seg in cn20k [25/33] net/cnxk: support Tx burst vector for cn20k [26/33] net/cnxk: support Tx multi-seg in vector for cn20k [27/33] common/cnxk: add flush wait after write of inline ctx [28/33] common/cnxk: fix CPT HW word size for outbound SA [29/33] net/cnxk: add PMD APIs for IPsec SA base and flush [30/33] net/cnxk: add PMD APIs to submit CPT instruction [31/33] net/cnxk: add PMD API to retrieve CPT queue statistics [32/33] net/cnxk: add option to enable custom inbound sa usage [33/33] net/cnxk: add PMD API to retrieve the model string

Checks

Context	Check	Description
ci/checkpatch	success	coding style OK
ci/iol-testing	fail	build patch failure

Commit Message

Nithin Dabilpuram Sept. 10, 2024, 8:58 a.m. UTC

From: Ashwin Sekhar T K <asekhar@marvell.com>

Add cn20k PCI device ids.

Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
---
 drivers/mempool/cnxk/cnxk_mempool.c | 2 ++
 1 file changed, 2 insertions(+)

diff mbox series

Patch

diff --git a/drivers/mempool/cnxk/cnxk_mempool.c b/drivers/mempool/cnxk/cnxk_mempool.c
index 1181b6f265..6ff11d8004 100644
--- a/drivers/mempool/cnxk/cnxk_mempool.c
+++ b/drivers/mempool/cnxk/cnxk_mempool.c
@@ -161,6 +161,7 @@  npa_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
 }
 
 static const struct rte_pci_id npa_pci_map[] = {
+	CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN20KA, PCI_DEVID_CNXK_RVU_NPA_PF),
 	CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_NPA_PF),
 	CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_NPA_PF),
 	CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KB, PCI_DEVID_CNXK_RVU_NPA_PF),
@@ -172,6 +173,7 @@  static const struct rte_pci_id npa_pci_map[] = {
 	CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KD, PCI_DEVID_CNXK_RVU_NPA_PF),
 	CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KE, PCI_DEVID_CNXK_RVU_NPA_PF),
 	CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF9KA, PCI_DEVID_CNXK_RVU_NPA_PF),
+	CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN20KA, PCI_DEVID_CNXK_RVU_NPA_VF),
 	CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_NPA_VF),
 	CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_NPA_VF),
 	CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KB, PCI_DEVID_CNXK_RVU_NPA_VF),