net/mlx5: fix the uplink port probing in bond mode

Message ID 20240717163541.324772-1-bingz@nvidia.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers
Series net/mlx5: fix the uplink port probing in bond mode |

Checks

Context Check Description
ci/checkpatch warning coding style issues
ci/loongarch-compilation success Compilation OK
ci/loongarch-unit-testing success Unit Testing PASS
ci/Intel-compilation success Compilation OK
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ci/intel-Functional success Functional PASS
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ci/iol-marvell-Functional success Functional Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-abi-testing success Testing PASS
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ci/iol-sample-apps-testing success Testing PASS
ci/iol-unit-amd64-testing success Testing PASS
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ci/iol-compile-amd64-testing success Testing PASS
ci/iol-compile-arm64-testing success Testing PASS

Commit Message

Bing Zhao July 17, 2024, 4:35 p.m. UTC
In the HW-LAG bonding mode, the representor port can be from both
slave PFs. When probing a representor (REP), the UPLINK (proxy) port
always needs to be probed firstly before any REP port.

In the current implementation, when probing a device with the
following format:

  -a 0000:XX:00.0,dv_flow_en=N,representor=pf1vfy

Since the REP belongs to the 2nd PF in the bonding, the UPLINK would
not be added into the probing ports list.

1. In dv_flow_en=1 mode, the REP itself can be probed. But it didn't
   obey the rules and the behaviors were inconsistent.
    a. When probing the REP from 1st PFs, the UPLINK was also probed.
    b. When detaching the UPLINK, all REPs were detached.
2. In dv_flow_en=2 mode, since some resources can only be allocated /
   created on the proxy port, the probing would get a failure.

By removing the unneeded check of the bonding PF device index, the
UPLINK will always try to be probed with any format.

Fixes: 2e569a370395 ("net/mlx5: add VF LAG mode bonding device recognition")

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
 drivers/net/mlx5/linux/mlx5_os.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)
  

Comments

Raslan Darawsheh July 21, 2024, 12:11 p.m. UTC | #1
Hi,

From: Bing Zhao <bingz@nvidia.com>
Sent: Wednesday, July 17, 2024 7:35 PM
To: Slava Ovsiienko; dev@dpdk.org; Raslan Darawsheh
Cc: Ori Kam; Dariusz Sosnowski; Suanming Mou; Matan Azrad
Subject: [PATCH] net/mlx5: fix the uplink port probing in bond mode

In the HW-LAG bonding mode, the representor port can be from both
slave PFs. When probing a representor (REP), the UPLINK (proxy) port
always needs to be probed firstly before any REP port.

In the current implementation, when probing a device with the
following format:

  -a 0000:XX:00.0,dv_flow_en=N,representor=pf1vfy

Since the REP belongs to the 2nd PF in the bonding, the UPLINK would
not be added into the probing ports list.

1. In dv_flow_en=1 mode, the REP itself can be probed. But it didn't
   obey the rules and the behaviors were inconsistent.
    a. When probing the REP from 1st PFs, the UPLINK was also probed.
    b. When detaching the UPLINK, all REPs were detached.
2. In dv_flow_en=2 mode, since some resources can only be allocated /
   created on the proxy port, the probing would get a failure.

By removing the unneeded check of the bonding PF device index, the
UPLINK will always try to be probed with any format.

Fixes: 2e569a370395 ("net/mlx5: add VF LAG mode bonding device recognition")

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>

Patch applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh
  

Patch

diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c
index 5e950e9be1..11336c430b 100644
--- a/drivers/net/mlx5/linux/mlx5_os.c
+++ b/drivers/net/mlx5/linux/mlx5_os.c
@@ -2473,8 +2473,7 @@  mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev,
 						list[ns].info.master = 0;
 						list[ns].info.representor = 0;
 					}
-					if (list[ns].info.port_name == bd)
-						ns++;
+					ns++;
 					break;
 				case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
 					/* Fallthrough */