diff mbox series

[1/2] eal: add flag to hide generic prefetch_write

Message ID 20240530171948.19763-2-daniel.gregory@bytedance.com (mailing list archive)
State New
Delegated to: Thomas Monjalon
Headers
Series eal/riscv: implement prefetch using zicbop |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Daniel Gregory May 30, 2024, 5:19 p.m. UTC 
This allows for the definition of architecture-specific implementations
of the rte_prefetch*_write collection of functions by defining
RTE_PREFETCH_WRITE_ARCH_DEFINED.

Signed-off-by: Daniel Gregory <daniel.gregory@bytedance.com>
---
 lib/eal/include/generic/rte_prefetch.h | 47 +++++++++++++++++---------
 1 file changed, 31 insertions(+), 16 deletions(-)
diff mbox series

Patch

diff --git a/lib/eal/include/generic/rte_prefetch.h b/lib/eal/include/generic/rte_prefetch.h
index f9fab5e359..5558376cba 100644
--- a/lib/eal/include/generic/rte_prefetch.h
+++ b/lib/eal/include/generic/rte_prefetch.h
@@ -65,14 +65,7 @@  static inline void rte_prefetch_non_temporal(const volatile void *p);
  */
 __rte_experimental
 static inline void
-rte_prefetch0_write(const void *p)
-{
-	/* 1 indicates intention to write, 3 sets target cache level to L1. See
-	 * GCC docs where these integer constants are described in more detail:
-	 *  https://gcc.gnu.org/onlinedocs/gcc/Other-Builtins.html
-	 */
-	__builtin_prefetch(p, 1, 3);
-}
+rte_prefetch0_write(const void *p);
 
 /**
  * @warning
@@ -86,14 +79,7 @@  rte_prefetch0_write(const void *p)
  */
 __rte_experimental
 static inline void
-rte_prefetch1_write(const void *p)
-{
-	/* 1 indicates intention to write, 2 sets target cache level to L2. See
-	 * GCC docs where these integer constants are described in more detail:
-	 *  https://gcc.gnu.org/onlinedocs/gcc/Other-Builtins.html
-	 */
-	__builtin_prefetch(p, 1, 2);
-}
+rte_prefetch1_write(const void *p);
 
 /**
  * @warning
@@ -105,6 +91,33 @@  rte_prefetch1_write(const void *p)
  *
  * @param p Address to prefetch
  */
+__rte_experimental
+static inline void
+rte_prefetch2_write(const void *p);
+
+#ifndef RTE_PREFETCH_WRITE_ARCH_DEFINED
+__rte_experimental
+static inline void
+rte_prefetch0_write(const void *p)
+{
+	/* 1 indicates intention to write, 3 sets target cache level to L1. See
+	 * GCC docs where these integer constants are described in more detail:
+	 *  https://gcc.gnu.org/onlinedocs/gcc/Other-Builtins.html
+	 */
+	__builtin_prefetch(p, 1, 3);
+}
+
+__rte_experimental
+static inline void
+rte_prefetch1_write(const void *p)
+{
+	/* 1 indicates intention to write, 2 sets target cache level to L2. See
+	 * GCC docs where these integer constants are described in more detail:
+	 *  https://gcc.gnu.org/onlinedocs/gcc/Other-Builtins.html
+	 */
+	__builtin_prefetch(p, 1, 2);
+}
+
 __rte_experimental
 static inline void
 rte_prefetch2_write(const void *p)
@@ -116,6 +129,8 @@  rte_prefetch2_write(const void *p)
 	__builtin_prefetch(p, 1, 1);
 }
 
+#endif /* RTE_PREFETCH_WRITE_ARCH_DEFINED */
+
 /**
  * @warning
  * @b EXPERIMENTAL: this API may change, or be removed, without prior notice