From patchwork Tue May 7 12:42:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Venkat Kumar Ande X-Patchwork-Id: 139981 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 736B943FC9; Tue, 7 May 2024 14:45:46 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 97123433F4; Tue, 7 May 2024 14:44:30 +0200 (CEST) Received: from NAM11-DM6-obe.outbound.protection.outlook.com (mail-dm6nam11on2082.outbound.protection.outlook.com [40.107.223.82]) by mails.dpdk.org (Postfix) with ESMTP id DC33F433ED for ; Tue, 7 May 2024 14:44:28 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=G+hL8+12KhAKQbNkygZgAb9DFH2qmqOzwVqZf4/9kGoYXvjnuISLK74t4khnbyajBeIzlO9C9uDdPJ7sBl48eVmztDATuGFsBKr6/eldkcM6a3M56q9Dok6MaZU6XKvMu6tanbgzOBpLw82pUX7xk4dYctEAPm1g37gow0wHuQ1muBi+w+rCh9gTz8zBB4ltqvq6N1sSh/RRAiCO8U7uEoijVtSr0MWzOjY01HKi9MywWsnAFtk9EzrHTpo8dGKWVujYrbLMavga5fq4se5yZCWU157nWHuLH2DrETx6gBCOI+a2cIicnqTtNCXsPUVg8ZWSul6TnvcvJ5AbS13zJA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=RBkkzdZT6F+4UgEzxWsn+D0cAdiCi4Ka/2wcz2+SFnk=; b=QwMJ7F5//Nl2iVMaeaHYnJiln7DN0LZP+EMtrSOTz+VcqcFkyuKhgBiO3RUJLkhPEV2ujrKZ3MPjZOWXA5Au+nuy56l3mBJyvaRN5snEL0ft2SeQxlpQLkZ6+eblUqRBp6W2oZEZYSw7qc+wbvDoM2jvrz9/dlcUeHz02ZnmPSC0PvAm7MoTRB2MSx/fnmg6poBmxO0laqzo867CIBtIUFlEhi7Wm8iOiIL8WM79occAO5W2buFbDxiLJQmvJZQQGpkI2C2GadLKPto/F5q/beXbuD4WXlHDTHEa5OjGEUcN4HR8VlPGVqjlLkjsadUaKHYFTd/b7xOhmuHyHblYjw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=dpdk.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=RBkkzdZT6F+4UgEzxWsn+D0cAdiCi4Ka/2wcz2+SFnk=; b=dG13a5CeTf9bc/O+UkvJysLoaLWXyJKCUmxCJmupmr3/fu9gRkIvaIFOBXzjoCBKEpqP/7GQOhioLrdkpcKCL+7m634L9HedEv6vf5aWDSm9jVq7oi0A1WexgHqFVPMPvJtH3Cv+SqKPYYBpfYahl/NaDt9h2iDOVzED50YRRts= Received: from PR2P264CA0014.FRAP264.PROD.OUTLOOK.COM (2603:10a6:101::26) by IA1PR12MB8288.namprd12.prod.outlook.com (2603:10b6:208:3fe::5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7544.42; Tue, 7 May 2024 12:44:26 +0000 Received: from SN1PEPF00036F42.namprd05.prod.outlook.com (2603:10a6:101:0:cafe::ff) by PR2P264CA0014.outlook.office365.com (2603:10a6:101::26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7544.41 via Frontend Transport; Tue, 7 May 2024 12:44:24 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SN1PEPF00036F42.mail.protection.outlook.com (10.167.248.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7544.18 via Frontend Transport; Tue, 7 May 2024 12:44:24 +0000 Received: from cae-Lilac-RMB.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 7 May 2024 07:44:16 -0500 From: Venkat Kumar Ande To: CC: , Venkat Kumar Ande Subject: [PATCH v2 18/25] net/axgbe: add support for 10 Mbps speed Date: Tue, 7 May 2024 18:12:58 +0530 Message-ID: <20240507124305.2318-18-venkatkumar.ande@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240507124305.2318-1-venkatkumar.ande@amd.com> References: <20240412125013.10498-1-VenkatKumar.Ande@amd.com> <20240507124305.2318-1-venkatkumar.ande@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF00036F42:EE_|IA1PR12MB8288:EE_ X-MS-Office365-Filtering-Correlation-Id: d85f9fb7-3de1-4659-a0bd-08dc6e936ce0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230031|376005|36860700004|82310400017|1800799015; X-Microsoft-Antispam-Message-Info: LOz7p283Tw7NZHLjevTfPQzu37kaedcWtHZY5WSFI+L0bXu8m9bt0V0x0yAoch9xT7Ji/YjxYWiidNP22Ks7dqPoRB5kDks2omrN7rurVkZH4qReJhdTVSh13VxMO6JiFSAqq8Pg44uODSeW81k4/NnZfuDlDknqPUVDMtfUj7G9MowvErXgfkD4sVDLZPqGexZM2v1uK5S+rTy+KS72lIji/X19NsEVcyyNueVf1x5n6LPoyVpnNhuo2FFaoHz1HzHRMsQQ3oNGdoXdOtIxE+/tw1VljUOoJSLO7OIO1tnfp4OJ8GZz94+Jz9p6VX+LilnuuXk/LTrfYkoQP43WS/VTEQ78zmZ25dd/OYgWRKWvBPcmrDFrR0gBtxc6as77iEnvr+MpVgNomH6wPc6SvVXHiu21A+xtDQ63Lgib8SKtX9P1H/wVK+kY78a22OU52fSYThZkrAM/e3KfZ/vjMw1+JVkY/Ehf6krJFHfhyddUwzvqL86OoBBylcW4aB0Qmr0ybhBOBTeznNpoqA5RN91QDSTOwsYeJxOWTiIumz9WqEKjROzuJBD8QBn2AL06GXrcOO7P/YXbn7LF5IL6KUFukHtTjR3CIEJYs2Qjxxka3JmJofnUhG1wjRd1D/LS7EnHdJsbgXSH/63GL5xJfQtn927c6mttEbjb1anbLNpUwNIS5BKF9hzNP/a5QVV7A4VbHIzz77darqedAx2uXxMm5ArGLdd55eIdXMP6ypJYKQnRGo8AmDrlZpuwfnJ/kNQT+s9+rT5X2urOcbDzxX0gYIXQCIiviLWlRDSQhgD7NC6F9c/OjTR7tn2UiT5LJelHiGD/vfA8dX+NVjsXJLAMSP8Xgr6nHVVh7nqDoWEhKJCAWBMAUaZAj+8T0R44y4AACGKuCl8fQrAxH1GmsEl0C9F10LN2eXzDcvVLPQLMjHE84f7zuopeBlM2hxAk/mxRpCjMTbJMMoVm7o+P7iYeKhkBuW4ZjKN5vBnovle6U6aCYKP4SzO7tnrQmeM7gnXWT4GMFJo93KYLD3seB9KSQ0VjOpBPLgWSKmiHY0fAT32ITLR0wTYBxlFQLiR6+k7odootMob7DMT2b7awbYbtaVpjlOv1GKRPZ0yMN7RyLgAMoKQWvtmiMlEXNTTdCnWDqwyRHB5z52EB2B/1wcfhtw/OLe+rQQh1mr+tuiJ1NURP3n13tatr+rx/dqgkTiXFPzgOyjOUfObGnTQq5yzPLO4EbVXRr+XkPQC/K48y6o0DPl44htDqoz1zz9sVNVxXlRL+PHMD1VBsSHWdc0aeiTOuaJsQVO87fr7HygFBFMu337NcCpwj0knIP2U8bOvAIOz4QdIrikGKvtsfwaG6cb0FLCrARusVxFOvU/c= X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(376005)(36860700004)(82310400017)(1800799015); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 May 2024 12:44:24.4894 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d85f9fb7-3de1-4659-a0bd-08dc6e936ce0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF00036F42.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB8288 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add the necessary changes to support 10 Mbps speed for BaseT and SFP port modes. This is supported in MAC ver >= 30H. Signed-off-by: Venkat Kumar Ande Acked-by: Selwin Sebastian Signed-off-by: Venkat Kumar Ande --- drivers/net/axgbe/axgbe_dev.c | 3 ++ drivers/net/axgbe/axgbe_ethdev.h | 2 + drivers/net/axgbe/axgbe_mdio.c | 22 +++++++++ drivers/net/axgbe/axgbe_phy.h | 2 + drivers/net/axgbe/axgbe_phy_impl.c | 75 ++++++++++++++++++++++++++++-- 5 files changed, 100 insertions(+), 4 deletions(-) diff --git a/drivers/net/axgbe/axgbe_dev.c b/drivers/net/axgbe/axgbe_dev.c index 5233633a53..6b413160c2 100644 --- a/drivers/net/axgbe/axgbe_dev.c +++ b/drivers/net/axgbe/axgbe_dev.c @@ -250,6 +250,9 @@ static int axgbe_set_speed(struct axgbe_port *pdata, int speed) unsigned int ss; switch (speed) { + case SPEED_10: + ss = 0x07; + break; case SPEED_1000: ss = 0x03; break; diff --git a/drivers/net/axgbe/axgbe_ethdev.h b/drivers/net/axgbe/axgbe_ethdev.h index 6dc1c1274b..4dcbf6d9a2 100644 --- a/drivers/net/axgbe/axgbe_ethdev.h +++ b/drivers/net/axgbe/axgbe_ethdev.h @@ -115,6 +115,7 @@ #define AXGBE_SGMII_AN_LINK_STATUS BIT(1) #define AXGBE_SGMII_AN_LINK_SPEED (BIT(2) | BIT(3)) +#define AXGBE_SGMII_AN_LINK_SPEED_10 0x00 #define AXGBE_SGMII_AN_LINK_SPEED_100 0x04 #define AXGBE_SGMII_AN_LINK_SPEED_1000 0x08 #define AXGBE_SGMII_AN_LINK_DUPLEX BIT(4) @@ -214,6 +215,7 @@ enum axgbe_mode { AXGBE_MODE_KX_2500, AXGBE_MODE_KR, AXGBE_MODE_X, + AXGBE_MODE_SGMII_10, AXGBE_MODE_SGMII_100, AXGBE_MODE_SGMII_1000, AXGBE_MODE_SFI, diff --git a/drivers/net/axgbe/axgbe_mdio.c b/drivers/net/axgbe/axgbe_mdio.c index faa7cdbf0a..9fe30e83bc 100644 --- a/drivers/net/axgbe/axgbe_mdio.c +++ b/drivers/net/axgbe/axgbe_mdio.c @@ -143,6 +143,15 @@ static void axgbe_sgmii_1000_mode(struct axgbe_port *pdata) pdata->phy_if.phy_impl.set_mode(pdata, AXGBE_MODE_SGMII_1000); } +static void axgbe_sgmii_10_mode(struct axgbe_port *pdata) +{ + /* Set MAC to 10M speed */ + pdata->hw_if.set_speed(pdata, SPEED_10); + + /* Call PHY implementation support to complete rate change */ + pdata->phy_if.phy_impl.set_mode(pdata, AXGBE_MODE_SGMII_10); +} + static void axgbe_sgmii_100_mode(struct axgbe_port *pdata) { @@ -176,6 +185,9 @@ static void axgbe_change_mode(struct axgbe_port *pdata, case AXGBE_MODE_KR: axgbe_kr_mode(pdata); break; + case AXGBE_MODE_SGMII_10: + axgbe_sgmii_10_mode(pdata); + break; case AXGBE_MODE_SGMII_100: axgbe_sgmii_100_mode(pdata); break; @@ -864,6 +876,7 @@ static int axgbe_phy_config_fixed(struct axgbe_port *pdata) case AXGBE_MODE_KX_1000: case AXGBE_MODE_KX_2500: case AXGBE_MODE_KR: + case AXGBE_MODE_SGMII_10: case AXGBE_MODE_SGMII_100: case AXGBE_MODE_SGMII_1000: case AXGBE_MODE_X: @@ -923,6 +936,8 @@ static int __axgbe_phy_config_aneg(struct axgbe_port *pdata, bool set_mode) axgbe_set_mode(pdata, AXGBE_MODE_SGMII_1000); } else if (axgbe_use_mode(pdata, AXGBE_MODE_SGMII_100)) { axgbe_set_mode(pdata, AXGBE_MODE_SGMII_100); + } else if (axgbe_use_mode(pdata, AXGBE_MODE_SGMII_10)) { + axgbe_set_mode(pdata, AXGBE_MODE_SGMII_10); } else { rte_intr_enable(pdata->pci_dev->intr_handle); ret = -EINVAL; @@ -1025,6 +1040,9 @@ static void axgbe_phy_status_result(struct axgbe_port *pdata) mode = axgbe_phy_status_aneg(pdata); switch (mode) { + case AXGBE_MODE_SGMII_10: + pdata->phy.speed = SPEED_10; + break; case AXGBE_MODE_SGMII_100: pdata->phy.speed = SPEED_100; break; @@ -1173,6 +1191,8 @@ static int axgbe_phy_start(struct axgbe_port *pdata) axgbe_sgmii_1000_mode(pdata); } else if (axgbe_use_mode(pdata, AXGBE_MODE_SGMII_100)) { axgbe_sgmii_100_mode(pdata); + } else if (axgbe_use_mode(pdata, AXGBE_MODE_SGMII_10)) { + axgbe_sgmii_10_mode(pdata); } else { ret = -EINVAL; goto err_stop; @@ -1220,6 +1240,8 @@ static int axgbe_phy_best_advertised_speed(struct axgbe_port *pdata) return SPEED_1000; else if (pdata->phy.advertising & ADVERTISED_100baseT_Full) return SPEED_100; + else if (pdata->phy.advertising & ADVERTISED_10baseT_Full) + return SPEED_10; return SPEED_UNKNOWN; } diff --git a/drivers/net/axgbe/axgbe_phy.h b/drivers/net/axgbe/axgbe_phy.h index 77ee20a31a..5b844e81cd 100644 --- a/drivers/net/axgbe/axgbe_phy.h +++ b/drivers/net/axgbe/axgbe_phy.h @@ -168,6 +168,7 @@ #define ADVERTISED_1000baseKX_Full (1 << 17) #define ADVERTISED_1000baseT_Full (1 << 5) #define ADVERTISED_100baseT_Full (1 << 3) +#define ADVERTISED_10baseT_Full (1 << 2) #define ADVERTISED_TP (1 << 7) #define ADVERTISED_FIBRE (1 << 10) #define ADVERTISED_Backplane (1 << 16) @@ -175,6 +176,7 @@ #define SUPPORTED_1000baseKX_Full (1 << 17) #define SUPPORTED_10000baseKR_Full (1 << 19) #define SUPPORTED_2500baseX_Full (1 << 15) +#define SUPPORTED_10baseT_Full (1 << 3) #define SUPPORTED_100baseT_Full (1 << 2) #define SUPPORTED_1000baseT_Full (1 << 5) #define SUPPORTED_10000baseT_Full (1 << 12) diff --git a/drivers/net/axgbe/axgbe_phy_impl.c b/drivers/net/axgbe/axgbe_phy_impl.c index 67a18e7c55..9c2c411b4f 100644 --- a/drivers/net/axgbe/axgbe_phy_impl.c +++ b/drivers/net/axgbe/axgbe_phy_impl.c @@ -7,6 +7,7 @@ #include "axgbe_common.h" #include "axgbe_phy.h" +#define AXGBE_PHY_PORT_SPEED_10 BIT(0) #define AXGBE_PHY_PORT_SPEED_100 BIT(1) #define AXGBE_PHY_PORT_SPEED_1000 BIT(2) #define AXGBE_PHY_PORT_SPEED_2500 BIT(3) @@ -490,6 +491,8 @@ static void axgbe_phy_sfp_phy_settings(struct axgbe_port *pdata) switch (phy_data->sfp_speed) { case AXGBE_SFP_SPEED_100_1000: + if (phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_10) + pdata->phy.advertising |= ADVERTISED_10baseT_Full; if (phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_100) pdata->phy.advertising |= ADVERTISED_100baseT_Full; if (phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_1000) @@ -511,6 +514,8 @@ static void axgbe_phy_sfp_phy_settings(struct axgbe_port *pdata) pdata->phy.advertising |= ADVERTISED_1000baseT_Full; else if (phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_100) pdata->phy.advertising |= ADVERTISED_100baseT_Full; + else if (phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_10) + pdata->phy.advertising |= ADVERTISED_10baseT_Full; } } @@ -980,6 +985,14 @@ static enum axgbe_mode axgbe_phy_an37_sgmii_outcome(struct axgbe_port *pdata) axgbe_phy_phydev_flowctrl(pdata); switch (pdata->an_status & AXGBE_SGMII_AN_LINK_SPEED) { + case AXGBE_SGMII_AN_LINK_SPEED_10: + if (pdata->an_status & AXGBE_SGMII_AN_LINK_DUPLEX) { + pdata->phy.lp_advertising |= ADVERTISED_10baseT_Full; + mode = AXGBE_MODE_SGMII_10; + } else { + mode = AXGBE_MODE_UNKNOWN; + } + break; case AXGBE_SGMII_AN_LINK_SPEED_100: if (pdata->an_status & AXGBE_SGMII_AN_LINK_DUPLEX) { pdata->phy.lp_advertising |= ADVERTISED_100baseT_Full; @@ -1347,6 +1360,18 @@ static void axgbe_phy_sgmii_1000_mode(struct axgbe_port *pdata) phy_data->cur_mode = AXGBE_MODE_SGMII_1000; } +static void axgbe_phy_sgmii_10_mode(struct axgbe_port *pdata) +{ + struct axgbe_phy_data *phy_data = pdata->phy_data; + + axgbe_phy_set_redrv_mode(pdata); + + /* 10M/SGMII */ + axgbe_phy_perform_ratechange(pdata, AXGBE_MB_CMD_SET_1G, AXGBE_MB_SUBCMD_10MBITS); + + phy_data->cur_mode = AXGBE_MODE_SGMII_10; +} + static enum axgbe_mode axgbe_phy_cur_mode(struct axgbe_port *pdata) { struct axgbe_phy_data *phy_data = pdata->phy_data; @@ -1363,6 +1388,7 @@ static enum axgbe_mode axgbe_phy_switch_baset_mode(struct axgbe_port *pdata) return axgbe_phy_cur_mode(pdata); switch (axgbe_phy_cur_mode(pdata)) { + case AXGBE_MODE_SGMII_10: case AXGBE_MODE_SGMII_100: case AXGBE_MODE_SGMII_1000: return AXGBE_MODE_KR; @@ -1433,6 +1459,8 @@ static enum axgbe_mode axgbe_phy_get_baset_mode(struct axgbe_phy_data *phy_data int speed) { switch (speed) { + case SPEED_10: + return AXGBE_MODE_SGMII_10; case SPEED_100: return AXGBE_MODE_SGMII_100; case SPEED_1000: @@ -1448,6 +1476,8 @@ static enum axgbe_mode axgbe_phy_get_sfp_mode(struct axgbe_phy_data *phy_data, int speed) { switch (speed) { + case SPEED_10: + return AXGBE_MODE_SGMII_10; case SPEED_100: return AXGBE_MODE_SGMII_100; case SPEED_1000: @@ -1525,6 +1555,9 @@ static void axgbe_phy_set_mode(struct axgbe_port *pdata, enum axgbe_mode mode) case AXGBE_MODE_SGMII_1000: axgbe_phy_sgmii_1000_mode(pdata); break; + case AXGBE_MODE_SGMII_10: + axgbe_phy_sgmii_10_mode(pdata); + break; default: break; } @@ -1566,6 +1599,9 @@ static bool axgbe_phy_use_baset_mode(struct axgbe_port *pdata, enum axgbe_mode mode) { switch (mode) { + case AXGBE_MODE_SGMII_10: + return axgbe_phy_check_mode(pdata, mode, + ADVERTISED_10baseT_Full); case AXGBE_MODE_SGMII_100: return axgbe_phy_check_mode(pdata, mode, ADVERTISED_100baseT_Full); @@ -1591,6 +1627,11 @@ static bool axgbe_phy_use_sfp_mode(struct axgbe_port *pdata, return false; return axgbe_phy_check_mode(pdata, mode, ADVERTISED_1000baseT_Full); + case AXGBE_MODE_SGMII_10: + if (phy_data->sfp_base != AXGBE_SFP_BASE_1000_T) + return false; + return axgbe_phy_check_mode(pdata, mode, + ADVERTISED_10baseT_Full); case AXGBE_MODE_SGMII_100: if (phy_data->sfp_base != AXGBE_SFP_BASE_1000_T) return false; @@ -1803,6 +1844,12 @@ static int axgbe_phy_mdio_reset_setup(struct axgbe_port *pdata) static bool axgbe_phy_port_mode_mismatch(struct axgbe_port *pdata) { struct axgbe_phy_data *phy_data = pdata->phy_data; + unsigned int ver; + + /* 10 Mbps speed is not supported in ver < 30H */ + ver = AXGMAC_GET_BITS(pdata->hw_feat.version, MAC_VR, SNPSVER); + if (ver < 0x30 && phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_10) + return true; switch (phy_data->port_mode) { case AXGBE_PORT_MODE_BACKPLANE: @@ -1816,7 +1863,8 @@ static bool axgbe_phy_port_mode_mismatch(struct axgbe_port *pdata) return false; break; case AXGBE_PORT_MODE_1000BASE_T: - if ((phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_100) || + if ((phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_10) || + (phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_100) || (phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_1000)) return false; break; @@ -1825,13 +1873,15 @@ static bool axgbe_phy_port_mode_mismatch(struct axgbe_port *pdata) return false; break; case AXGBE_PORT_MODE_NBASE_T: - if ((phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_100) || + if ((phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_10) || + (phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_100) || (phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_1000) || (phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_2500)) return false; break; case AXGBE_PORT_MODE_10GBASE_T: - if ((phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_100) || + if ((phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_10) || + (phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_100) || (phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_1000) || (phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_10000)) return false; @@ -1841,7 +1891,8 @@ static bool axgbe_phy_port_mode_mismatch(struct axgbe_port *pdata) return false; break; case AXGBE_PORT_MODE_SFP: - if ((phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_100) || + if ((phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_10) || + (phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_100) || (phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_1000) || (phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_10000)) return false; @@ -2150,6 +2201,10 @@ static int axgbe_phy_init(struct axgbe_port *pdata) pdata->phy.supported |= SUPPORTED_Autoneg; pdata->phy.supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause; pdata->phy.supported |= SUPPORTED_TP; + if (phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_10) { + pdata->phy.supported |= SUPPORTED_10baseT_Full; + phy_data->start_mode = AXGBE_MODE_SGMII_10; + } if (phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_100) { pdata->phy.supported |= SUPPORTED_100baseT_Full; phy_data->start_mode = AXGBE_MODE_SGMII_100; @@ -2178,6 +2233,10 @@ static int axgbe_phy_init(struct axgbe_port *pdata) pdata->phy.supported |= SUPPORTED_Autoneg; pdata->phy.supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause; pdata->phy.supported |= SUPPORTED_TP; + if (phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_10) { + pdata->phy.supported |= SUPPORTED_10baseT_Full; + phy_data->start_mode = AXGBE_MODE_SGMII_10; + } if (phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_100) { pdata->phy.supported |= SUPPORTED_100baseT_Full; phy_data->start_mode = AXGBE_MODE_SGMII_100; @@ -2199,6 +2258,10 @@ static int axgbe_phy_init(struct axgbe_port *pdata) pdata->phy.supported |= SUPPORTED_Autoneg; pdata->phy.supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause; pdata->phy.supported |= SUPPORTED_TP; + if (phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_10) { + pdata->phy.supported |= SUPPORTED_10baseT_Full; + phy_data->start_mode = AXGBE_MODE_SGMII_10; + } if (phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_100) { pdata->phy.supported |= SUPPORTED_100baseT_Full; phy_data->start_mode = AXGBE_MODE_SGMII_100; @@ -2234,6 +2297,10 @@ static int axgbe_phy_init(struct axgbe_port *pdata) pdata->phy.supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause; pdata->phy.supported |= SUPPORTED_TP; pdata->phy.supported |= SUPPORTED_FIBRE; + if (phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_10) { + pdata->phy.supported |= SUPPORTED_10baseT_Full; + phy_data->start_mode = AXGBE_MODE_SGMII_10; + } if (phy_data->port_speeds & AXGBE_PHY_PORT_SPEED_100) { pdata->phy.supported |= SUPPORTED_100baseT_Full; phy_data->start_mode = AXGBE_MODE_SGMII_100;