[v2,2/3] crypto/cnxk: support queue pair depth API

Message ID 20240412115722.3709194-3-gakhil@marvell.com (mailing list archive)
State Accepted
Delegated to: akhil goyal
Headers
Series cryptodev: add API to get used queue pair depth |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Akhil Goyal April 12, 2024, 11:57 a.m. UTC
  Added support to get the used queue pair depth
for a specific queue on cn10k platform.

Signed-off-by: Akhil Goyal <gakhil@marvell.com>
---
 drivers/crypto/cnxk/cn10k_cryptodev.c    |  1 +
 drivers/crypto/cnxk/cn9k_cryptodev.c     |  2 ++
 drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 16 ++++++++++++++++
 drivers/crypto/cnxk/cnxk_cryptodev_ops.h |  2 ++
 4 files changed, 21 insertions(+)
  

Patch

diff --git a/drivers/crypto/cnxk/cn10k_cryptodev.c b/drivers/crypto/cnxk/cn10k_cryptodev.c
index 5ed918e18e..70bef13cda 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev.c
@@ -99,6 +99,7 @@  cn10k_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 	dev->driver_id = cn10k_cryptodev_driver_id;
 	dev->feature_flags = cnxk_cpt_default_ff_get();
 
+	dev->qp_depth_used = cnxk_cpt_qp_depth_used;
 	cn10k_cpt_set_enqdeq_fns(dev, vf);
 	cn10k_sec_ops_override();
 
diff --git a/drivers/crypto/cnxk/cn9k_cryptodev.c b/drivers/crypto/cnxk/cn9k_cryptodev.c
index 47b0874185..818458bd6f 100644
--- a/drivers/crypto/cnxk/cn9k_cryptodev.c
+++ b/drivers/crypto/cnxk/cn9k_cryptodev.c
@@ -15,6 +15,7 @@ 
 #include "cn9k_ipsec.h"
 #include "cnxk_cryptodev.h"
 #include "cnxk_cryptodev_capabilities.h"
+#include "cnxk_cryptodev_ops.h"
 #include "cnxk_cryptodev_sec.h"
 
 #include "roc_api.h"
@@ -96,6 +97,7 @@  cn9k_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 	dev->dev_ops = &cn9k_cpt_ops;
 	dev->driver_id = cn9k_cryptodev_driver_id;
 	dev->feature_flags = cnxk_cpt_default_ff_get();
+	dev->qp_depth_used = cnxk_cpt_qp_depth_used;
 
 	cnxk_cpt_caps_populate(vf);
 
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
index 1dd1dbac9a..d7f5780637 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -496,6 +496,22 @@  cnxk_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
 	return ret;
 }
 
+uint32_t
+cnxk_cpt_qp_depth_used(void *qptr)
+{
+	struct cnxk_cpt_qp *qp = qptr;
+	struct pending_queue *pend_q;
+	union cpt_fc_write_s fc;
+
+	pend_q = &qp->pend_q;
+
+	fc.u64[0] = rte_atomic_load_explicit((RTE_ATOMIC(uint64_t)*)(qp->lmtline.fc_addr),
+			rte_memory_order_relaxed);
+
+	return RTE_MAX(pending_queue_infl_cnt(pend_q->head, pend_q->tail, pend_q->pq_mask),
+		       fc.s.qsize);
+}
+
 unsigned int
 cnxk_cpt_sym_session_get_size(struct rte_cryptodev *dev __rte_unused)
 {
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
index e7bba25cb8..708fad910d 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
@@ -142,6 +142,8 @@  int cnxk_ae_session_cfg(struct rte_cryptodev *dev,
 void cnxk_cpt_dump_on_err(struct cnxk_cpt_qp *qp);
 int cnxk_cpt_queue_pair_event_error_query(struct rte_cryptodev *dev, uint16_t qp_id);
 
+uint32_t cnxk_cpt_qp_depth_used(void *qptr);
+
 static __rte_always_inline void
 pending_queue_advance(uint64_t *index, const uint64_t mask)
 {