From patchwork Thu Apr 11 08:27:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akhil Goyal X-Patchwork-Id: 139226 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1E73A43E42; Thu, 11 Apr 2024 10:30:13 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D76E040268; Thu, 11 Apr 2024 10:30:12 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 0F29140262 for ; Thu, 11 Apr 2024 10:30:11 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 43AJ3Lag022437; Thu, 11 Apr 2024 01:30:11 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding:content-type; s=pfpt0220; bh=siOLW0mB wzh2hwYQyR8BNgPx+uAp1ZBPMc+UIo91vGg=; b=KBz4wgKQdfbkB2R35F/NNvhi /bX9IBGAqcfvkaLExuJPvoKOGubPklTyFqV6Yf0Let+2/RQTArmreP5Crck1b/Lh ZLE3yk1iDFhiocTnA28B+2OrrbdwOFN9juNFDVgdKyPAQ1Hlg5lyhI651NcafJXJ oVZ9Pf5c3/U0lTJS8zaV5jf9WEaEQbWr0Rno7Bbe4Bq274wOHFSOjDq/UMOlWsV8 MHOk+5WC33IFOzrnwB6fpuilnDPKUyv4wCKp4kl0TbKKsXcLYDkbx6wq1P+8gUl9 l6bxR3ckaStxMNtUc2ljhzpAWI1X/EMQVdt+l9vauxh2YXkBtHQp5fumbyzJXg== Received: from dc6wp-exch02.marvell.com ([4.21.29.225]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3xdqc2txfn-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 11 Apr 2024 01:29:59 -0700 (PDT) Received: from DC6WP-EXCH02.marvell.com (10.76.176.209) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 11 Apr 2024 01:27:41 -0700 Received: from maili.marvell.com (10.69.176.80) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Thu, 11 Apr 2024 01:27:41 -0700 Received: from localhost.localdomain (unknown [10.28.36.102]) by maili.marvell.com (Postfix) with ESMTP id 60F403F706A; Thu, 11 Apr 2024 01:27:39 -0700 (PDT) From: Akhil Goyal To: CC: , , Akhil Goyal Subject: [PATCH] app/crypto-perf: support IPsec/TLS segmented buffers Date: Thu, 11 Apr 2024 13:57:35 +0530 Message-ID: <20240411082735.3496021-1-gakhil@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: 0V8pC3dm4qNBi2ioJauQlElHCbLJuk_- X-Proofpoint-GUID: 0V8pC3dm4qNBi2ioJauQlElHCbLJuk_- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-04-11_02,2024-04-09_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Added support to allow segmented buffers for IPsec and tls-record security offload cases. Signed-off-by: Akhil Goyal --- app/test-crypto-perf/cperf_ops.c | 55 ++++++++++++++++++++------------ 1 file changed, 34 insertions(+), 21 deletions(-) diff --git a/app/test-crypto-perf/cperf_ops.c b/app/test-crypto-perf/cperf_ops.c index d3fd115bc0..4ca001b721 100644 --- a/app/test-crypto-perf/cperf_ops.c +++ b/app/test-crypto-perf/cperf_ops.c @@ -43,10 +43,8 @@ test_ipsec_vec_populate(struct rte_mbuf *m, const struct cperf_options *options, struct rte_ipv4_hdr *ip = rte_pktmbuf_mtod(m, struct rte_ipv4_hdr *); if (options->is_outbound) { - memcpy(ip, test_vector->plaintext.data, - sizeof(struct rte_ipv4_hdr)); - - ip->total_length = rte_cpu_to_be_16(m->data_len); + memcpy(ip, test_vector->plaintext.data, sizeof(struct rte_ipv4_hdr)); + ip->total_length = rte_cpu_to_be_16(m->pkt_len); } } @@ -131,8 +129,6 @@ cperf_set_ops_security_ipsec(struct rte_crypto_op **ops, { void *sec_sess = sess; const uint32_t test_buffer_size = options->test_buffer_size; - const uint32_t headroom_sz = options->headroom_sz; - const uint32_t segment_sz = options->segment_sz; uint64_t tsc_start_temp, tsc_end_temp; uint16_t i = 0; @@ -141,20 +137,27 @@ cperf_set_ops_security_ipsec(struct rte_crypto_op **ops, for (i = 0; i < nb_ops; i++) { struct rte_crypto_sym_op *sym_op = ops[i]->sym; struct rte_mbuf *m = sym_op->m_src; + uint32_t offset = test_buffer_size; ops[i]->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED; rte_security_attach_session(ops[i], sec_sess); - sym_op->m_src = (struct rte_mbuf *)((uint8_t *)ops[i] + - src_buf_offset); + sym_op->m_src = (struct rte_mbuf *)((uint8_t *)ops[i] + src_buf_offset); + sym_op->m_src->pkt_len = test_buffer_size; - /* In case of IPsec, headroom is consumed by PMD, - * hence resetting it. + while ((m->next != NULL) && (offset >= m->data_len)) { + offset -= m->data_len; + m = m->next; + } + m->data_len = offset; + /* + * If there is not enough room in segment, + * place the digest in the next segment */ - m->data_off = headroom_sz; - - m->buf_len = segment_sz; - m->data_len = test_buffer_size; - m->pkt_len = test_buffer_size; + if (rte_pktmbuf_tailroom(m) < options->digest_sz) { + m = m->next; + offset = 0; + } + m->next = NULL; sym_op->m_dst = NULL; } @@ -186,8 +189,6 @@ cperf_set_ops_security_tls(struct rte_crypto_op **ops, uint64_t *tsc_start) { const uint32_t test_buffer_size = options->test_buffer_size; - const uint32_t headroom_sz = options->headroom_sz; - const uint32_t segment_sz = options->segment_sz; uint16_t i = 0; RTE_SET_USED(imix_idx); @@ -197,16 +198,28 @@ cperf_set_ops_security_tls(struct rte_crypto_op **ops, for (i = 0; i < nb_ops; i++) { struct rte_crypto_sym_op *sym_op = ops[i]->sym; struct rte_mbuf *m = sym_op->m_src; + uint32_t offset = test_buffer_size; ops[i]->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED; ops[i]->param1.tls_record.content_type = 0x17; rte_security_attach_session(ops[i], sess); sym_op->m_src = (struct rte_mbuf *)((uint8_t *)ops[i] + src_buf_offset); + sym_op->m_src->pkt_len = test_buffer_size; - m->data_off = headroom_sz; - m->buf_len = segment_sz; - m->data_len = test_buffer_size; - m->pkt_len = test_buffer_size; + while ((m->next != NULL) && (offset >= m->data_len)) { + offset -= m->data_len; + m = m->next; + } + m->data_len = offset; + /* + * If there is not enough room in segment, + * place the digest in the next segment + */ + if ((rte_pktmbuf_tailroom(m)) < options->digest_sz) { + m = m->next; + m->data_len = 0; + } + m->next = NULL; sym_op->m_dst = NULL; }