From patchwork Fri Mar 15 06:45:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vidya Sagar Velumuri X-Patchwork-Id: 138426 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 31C2843CA6; Fri, 15 Mar 2024 07:45:55 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 484D842EE7; Fri, 15 Mar 2024 07:45:29 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id DE07542EEB for ; Fri, 15 Mar 2024 07:45:27 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 42EMJwY3001513 for ; Thu, 14 Mar 2024 23:45:25 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= pfpt0220; bh=SqBBJXvWJDUBiRPegMFST9LtVd+H9gcji1w5LepsODQ=; b=e4k SqgX06B0dTUCZbB6Kuy7TcDaOgLQFmfQAVGMezgYL5jK3t9OnWa6O6FVNzG6cGgd I7BenBojIhQE/6ZEK28/x/JgQJW0h+r0MZO0TPemMkEw2ME0eGdiJKoAXAk71nBy Q9trig//IS3Ojk2S5VMqidWnBnlLB7fNd61ZeTE7hdHwf8EBfZNkmIFtTegjKwuw G0GjBrFd6VXeUq4had/tw6u0RgfMLe6aHqbfx1CFDdIezpScSKFUm1cpxiuAZuZ8 zL+4sPTJ284l8bD7eojoIU60C8RCMMomdwNU8Ro/1RYP8EMo9rcyuDLaKEmJ5hwg iVmj8ws7pj1KEr6Ix4g== Received: from dc5-exch05.marvell.com ([199.233.59.128]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3wv9xa1768-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 14 Mar 2024 23:45:25 -0700 (PDT) Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.1258.12; Thu, 14 Mar 2024 23:45:24 -0700 Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Thu, 14 Mar 2024 23:45:24 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1258.12 via Frontend Transport; Thu, 14 Mar 2024 23:45:24 -0700 Received: from BG-LT92004.corp.innovium.com (unknown [10.193.69.194]) by maili.marvell.com (Postfix) with ESMTP id 7895D3F706A; Thu, 14 Mar 2024 23:45:22 -0700 (PDT) From: Vidya Sagar Velumuri To: Akhil Goyal CC: Anoob Joseph , Jerin Jacob , , Aakash Sasidharan Subject: [PATCH v4 4/8] crypto/cnxk: avoid branches in datapath Date: Fri, 15 Mar 2024 12:15:07 +0530 Message-ID: <20240315064511.639-5-vvelumuri@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240315064511.639-1-vvelumuri@marvell.com> References: <20240315054213.540-1-vvelumuri@marvell.com> <20240315064511.639-1-vvelumuri@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: K4sd9RRJsVdjaUXacp9q0aT1fKRujaPj X-Proofpoint-GUID: K4sd9RRJsVdjaUXacp9q0aT1fKRujaPj X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-03-14_13,2024-03-13_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Anoob Joseph Avoid branches in datapath. Signed-off-by: Anoob Joseph --- drivers/crypto/cnxk/cn10k_ipsec_la_ops.h | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h b/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h index a30b8e413d..4e95fbb6eb 100644 --- a/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h +++ b/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h @@ -73,12 +73,10 @@ process_outb_sa(struct roc_cpt_lf *lf, struct rte_crypto_op *cop, struct cn10k_s roc_cpt_lf_ctx_reload(lf, &sess->sa.out_sa); rte_delay_ms(1); #endif + const uint64_t ol_flags = m_src->ol_flags; - if (m_src->ol_flags & RTE_MBUF_F_TX_IP_CKSUM) - inst_w4_u64 &= ~BIT_ULL(33); - - if (m_src->ol_flags & RTE_MBUF_F_TX_L4_MASK) - inst_w4_u64 &= ~BIT_ULL(32); + inst_w4_u64 &= ~(((uint64_t)(!!(ol_flags & RTE_MBUF_F_TX_IP_CKSUM)) << 33) | + ((uint64_t)(!!(ol_flags & RTE_MBUF_F_TX_L4_MASK)) << 32)); if (likely(m_src->next == NULL)) { if (unlikely(rte_pktmbuf_tailroom(m_src) < sess->max_extended_len)) {