From patchwork Mon Mar 4 09:01:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 137857 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A897A43B9B; Mon, 4 Mar 2024 10:04:42 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 31FBB42DD5; Mon, 4 Mar 2024 10:02:15 +0100 (CET) Received: from smtp-fw-9102.amazon.com (smtp-fw-9102.amazon.com [207.171.184.29]) by mails.dpdk.org (Postfix) with ESMTP id 8066440EAB for ; Mon, 4 Mar 2024 10:02:07 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709542928; x=1741078928; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=dI/+4j50ym1i6p7Y/+jdESCGnAYK60J+dlv/WbcCxD4=; b=cstszQ3CazkTxBG8VsQ7XFpcXVDloZ9za6METSUite9gtJNNbDtYhAhU 23jwf07zwmx22xfKis7jGjoZD0loG5dXsMeY/uwfIdwA80hmT9B6QT3Tv +NejtDVBUzGifLiC82TzaDhIkwjX19e9U44kV8gBEf8zhnNrX9jaYTdmB U=; X-IronPort-AV: E=Sophos;i="6.06,203,1705363200"; d="scan'208";a="401284699" Received: from pdx4-co-svc-p1-lb2-vlan3.amazon.com (HELO smtpout.prod.us-east-1.prod.farcaster.email.amazon.dev) ([10.25.36.214]) by smtp-border-fw-9102.sea19.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Mar 2024 09:02:02 +0000 Received: from EX19MTAEUC002.ant.amazon.com [10.0.17.79:22169] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.0.36:2525] with esmtp (Farcaster) id bfe20b55-b806-4b46-8152-408336216e67; Mon, 4 Mar 2024 09:01:59 +0000 (UTC) X-Farcaster-Flow-ID: bfe20b55-b806-4b46-8152-408336216e67 Received: from EX19D007EUB002.ant.amazon.com (10.252.51.117) by EX19MTAEUC002.ant.amazon.com (10.252.51.245) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Mon, 4 Mar 2024 09:01:59 +0000 Received: from EX19MTAUEC001.ant.amazon.com (10.252.135.222) by EX19D007EUB002.ant.amazon.com (10.252.51.117) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Mon, 4 Mar 2024 09:01:59 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.212.49) by mail-relay.amazon.com (10.252.135.200) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Mon, 4 Mar 2024 09:01:58 +0000 From: To: CC: , Shai Brandes Subject: [PATCH 13/33] net/ena/hal: use correct read once on u8 field Date: Mon, 4 Mar 2024 11:01:16 +0200 Message-ID: <20240304090136.861-14-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240304090136.861-1-shaibran@amazon.com> References: <20240304090136.861-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes The flags field in ena_eth_io_tx_cdesc is 8-bits long. The current macro used is READ_ONCE16. Switching to READ_ONCE8 to avoid reading extra data. Given that there's an implicit cast to u8 in the assignment, the correct value is being read, but this change makes it even more accurate. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/hal/ena_eth_com.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ena/hal/ena_eth_com.h b/drivers/net/ena/hal/ena_eth_com.h index cee4f35124..6a7c17f84f 100644 --- a/drivers/net/ena/hal/ena_eth_com.h +++ b/drivers/net/ena/hal/ena_eth_com.h @@ -219,7 +219,7 @@ static inline int ena_com_tx_comp_req_id_get(struct ena_com_io_cq *io_cq, * expected, it mean that the device still didn't update * this completion. */ - cdesc_phase = READ_ONCE16(cdesc->flags) & ENA_ETH_IO_TX_CDESC_PHASE_MASK; + cdesc_phase = READ_ONCE8(cdesc->flags) & ENA_ETH_IO_TX_CDESC_PHASE_MASK; if (cdesc_phase != expected_phase) return ENA_COM_TRY_AGAIN;