From patchwork Thu Feb 15 10:02:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rushil Gupta X-Patchwork-Id: 136825 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 217E743B0F; Thu, 15 Feb 2024 11:02:36 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 69A15433F5; Thu, 15 Feb 2024 11:02:35 +0100 (CET) Received: from mail-yw1-f201.google.com (mail-yw1-f201.google.com [209.85.128.201]) by mails.dpdk.org (Postfix) with ESMTP id 103444029A for ; Thu, 15 Feb 2024 11:02:33 +0100 (CET) Received: by mail-yw1-f201.google.com with SMTP id 00721157ae682-60761bdbd4cso12395507b3.3 for ; Thu, 15 Feb 2024 02:02:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1707991353; x=1708596153; darn=dpdk.org; h=cc:to:from:subject:message-id:mime-version:date:from:to:cc:subject :date:message-id:reply-to; bh=kNoxnpadYN2w+Jm/a3/knWUaqZYJcmqTU8eoW8os7kY=; b=exchGt6AAiCI8PpLtE0GRae1Sucf7U7dzhpYWw2qLGv9RtsO64CcmJacPENlSqCt8b e2kDnApnQlgFq6q1DR1GyqMcHwKp++61r7NK8Fk96ZznVQi6Q0mcjzx2VFCiQ6WAGKhr Nd4IAlWYAbua7XziP98r2NfnbGPKXVTWNqHA0KIfruOFnIlaSjOahf1fS881MvfnHL3f Xmi2Q7X9JZ0EzAP+mVaNIlvz1NG0bKmhD0/5rRsbvg+jbJk7u9KuCGgQkiJDje1ZlpZ6 DPUgCVcPSw4xglhg/Q899PaBTSBfSx8qswZkGsCyq81cZzIKqmvoDdghIcGwGTmVo/uJ yqwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1707991353; x=1708596153; h=cc:to:from:subject:message-id:mime-version:date:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=kNoxnpadYN2w+Jm/a3/knWUaqZYJcmqTU8eoW8os7kY=; b=I38tmt/MnDMFtOCHdqbOKgghKs7Jo990GohKpM1CN8aUS/zcrX+/q4ImDmudsbDGW7 Gmanl0uw12D9zhX/5d2ivU19MbbdDzyRIN6fh+CqOXOLZAPHAwRqBvv4vmUCSMJSW2Fv 4RoTQwx1YSdGRmUSISB0cLz2vLkKfOSKpAJEFbtLBmvWGK6p4HPeAg0aRFFKjM++KAZX 9BOVYL9Fn3vEPIWQHPTDiLjguJzPhkRuRBM/9F9LsKoHj519AmokBubGG3W5J1Qpq612 Tr5F4u8osi6rMdLAe+C/TQHpxY99y3RQLzGTh7Tncn/91lzU4qje1AqBkOoZwQzyQmI2 FeEQ== X-Gm-Message-State: AOJu0Yz/xGwVTP1jUcs3bFKn60R8PG0xB/lyWwXlL46BVWK+yQpSPd2K c9MIZoM3/0Bvsm0qXWgl9gAPC0MtlwjRt+bWxF9UI1h1gMsFuqis1zf1V90Ch0jC3Z6Nssc+XYo WoBuliA== X-Google-Smtp-Source: AGHT+IHF5T1thNZNhqhtQ0wAWRp5Sv4VlABFjlRzTe9m9/Mc6V0QIwL56Q0EgrEL8uXOYnPIoufEjmB1JqWV X-Received: from rushilg.c.googlers.com ([fda3:e722:ac3:cc00:2b:ff92:c0a8:f27]) (user=rushilg job=sendgmr) by 2002:a25:ac86:0:b0:dca:33b8:38d7 with SMTP id x6-20020a25ac86000000b00dca33b838d7mr333614ybi.11.1707991353299; Thu, 15 Feb 2024 02:02:33 -0800 (PST) Date: Thu, 15 Feb 2024 10:02:30 +0000 Mime-Version: 1.0 X-Mailer: git-send-email 2.44.0.rc0.258.g7320e95886-goog Message-ID: <20240215100230.235462-1-rushilg@google.com> Subject: [PATCH] net/gve: fix dqo bug for chained descriptors From: Rushil Gupta To: junfeng.guo@intel.com, jeroendb@google.com, joshwash@google.com, ferruh.yigit@amd.com Cc: dev@dpdk.org, stable@dpdk.org, Rushil Gupta X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Dqo Tx path had a bug where driver was overwriting mbufs in sw-ring. We fixed this bug by cleaning slots for all segments. Fixes: 4022f9 ("net/gve: support basic Tx data path for DQO") Cc: stable@dpdk.org Signed-off-by: Rushil Gupta Reviewed-by: Joshua Washington --- drivers/net/gve/gve_tx_dqo.c | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/net/gve/gve_tx_dqo.c b/drivers/net/gve/gve_tx_dqo.c index 16101de84f..1a8eb96ea9 100644 --- a/drivers/net/gve/gve_tx_dqo.c +++ b/drivers/net/gve/gve_tx_dqo.c @@ -13,7 +13,7 @@ gve_tx_clean_dqo(struct gve_tx_queue *txq) struct gve_tx_compl_desc *compl_desc; struct gve_tx_queue *aim_txq; uint16_t nb_desc_clean; - struct rte_mbuf *txe; + struct rte_mbuf *txe, *txe_next; uint16_t compl_tag; uint16_t next; @@ -43,10 +43,15 @@ gve_tx_clean_dqo(struct gve_tx_queue *txq) PMD_DRV_LOG(DEBUG, "GVE_COMPL_TYPE_DQO_REINJECTION !!!"); /* FALLTHROUGH */ case GVE_COMPL_TYPE_DQO_PKT: + /* free all segments. */ txe = aim_txq->sw_ring[compl_tag]; - if (txe != NULL) { + while (txe != NULL) { + txe_next = txe->next; rte_pktmbuf_free_seg(txe); - txe = NULL; + if (aim_txq->sw_ring[compl_tag] == txe) + aim_txq->sw_ring[compl_tag] = NULL; + txe = txe_next; + compl_tag = (compl_tag + 1) & (aim_txq->sw_size - 1); } break; case GVE_COMPL_TYPE_DQO_MISS: @@ -83,6 +88,7 @@ gve_tx_burst_dqo(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) uint16_t tx_id; uint16_t sw_id; uint64_t bytes; + uint16_t first_sw_id; sw_ring = txq->sw_ring; txr = txq->tx_ring; @@ -107,23 +113,25 @@ gve_tx_burst_dqo(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) ol_flags = tx_pkt->ol_flags; nb_used = tx_pkt->nb_segs; - + first_sw_id = sw_id; do { - txd = &txr[tx_id]; + if (sw_ring[sw_id] != NULL) + PMD_DRV_LOG(ERR, "Overwriting an entry in sw_ring"); + txd = &txr[tx_id]; sw_ring[sw_id] = tx_pkt; /* fill Tx descriptor */ txd->pkt.buf_addr = rte_cpu_to_le_64(rte_mbuf_data_iova(tx_pkt)); txd->pkt.dtype = GVE_TX_PKT_DESC_DTYPE_DQO; - txd->pkt.compl_tag = rte_cpu_to_le_16(sw_id); + txd->pkt.compl_tag = rte_cpu_to_le_16(first_sw_id); txd->pkt.buf_size = RTE_MIN(tx_pkt->data_len, GVE_TX_MAX_BUF_SIZE_DQO); /* size of desc_ring and sw_ring could be different */ tx_id = (tx_id + 1) & mask; sw_id = (sw_id + 1) & sw_mask; - bytes += tx_pkt->pkt_len; + bytes += tx_pkt->data_len; tx_pkt = tx_pkt->next; } while (tx_pkt);