From patchwork Tue Jan 23 11:40:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 136059 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 89754439A7; Tue, 23 Jan 2024 12:41:26 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id CD8F9410FB; Tue, 23 Jan 2024 12:41:19 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) by mails.dpdk.org (Postfix) with ESMTP id 88ECC410F1 for ; Tue, 23 Jan 2024 12:41:16 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706010077; x=1737546077; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=GOOrFpcPtArETrpFtX6CcH467KUXneg+n2Qe4vgNksw=; b=LdQNhFmenlLpRlig09cyeYAtv8q8LED2rHVEI/iYWTNHQe3TmQMmU/Yd AqEp0Ldz74R/B7+f3dxPZ44YIn+n2oY9WXukwxXuoC8S2lv6omYl5BU75 UsAcPayZhy8gc6ttyjZhTTlZA8IjlrW9Il4Sl0PIgFRvP1OBMrK+17Nzt UMlybgnp+qdT7BafOza8bvYD3Zz/niNuZ5NRF6tCAJRQ93pLg/yeL/rU3 H8Es0mxe+P1jlpxycH62mdnIdUYuyrgjZjMzQfqWmrL7RngLv1mE6yjiy zyJSyehhugQaHnRxOCnVIIx77sCqC6wCvi1oNBtatzOFl8GojE5FTq3hD g==; X-IronPort-AV: E=McAfee;i="6600,9927,10961"; a="22965764" X-IronPort-AV: E=Sophos;i="6.05,214,1701158400"; d="scan'208";a="22965764" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2024 03:41:16 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,214,1701158400"; d="scan'208";a="27722321" Received: from silpixa00400957.ir.intel.com (HELO silpixa00401385.ir.intel.com) ([10.237.214.26]) by orviesa002.jf.intel.com with ESMTP; 23 Jan 2024 03:41:15 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: Bruce Richardson Subject: [PATCH 2/6] net/i40e: reduce code indentation Date: Tue, 23 Jan 2024 11:40:49 +0000 Message-Id: <20240123114053.172189-3-bruce.richardson@intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240123114053.172189-1-bruce.richardson@intel.com> References: <20240123114053.172189-1-bruce.richardson@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org With the removal of the #ifdef block for 16-byte descriptor loads, the do { } while(0) around the descriptor load block becomes unnecessary. Removing that do-while allows us to reduce indentation level of the code by one tab, and makes the function that little cleaner and clearer to read. Signed-off-by: Bruce Richardson --- drivers/net/i40e/i40e_rxtx_vec_avx2.c | 51 +++++++++++++-------------- 1 file changed, 24 insertions(+), 27 deletions(-) diff --git a/drivers/net/i40e/i40e_rxtx_vec_avx2.c b/drivers/net/i40e/i40e_rxtx_vec_avx2.c index ce87e185f0..19cf0ac718 100644 --- a/drivers/net/i40e/i40e_rxtx_vec_avx2.c +++ b/drivers/net/i40e/i40e_rxtx_vec_avx2.c @@ -276,33 +276,30 @@ _recv_raw_pkts_vec_avx2(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts, _mm256_loadu_si256((void *)&sw_ring[i + 4])); #endif - __m256i raw_desc0_1, raw_desc2_3, raw_desc4_5, raw_desc6_7; - do { - const __m128i raw_desc7 = _mm_load_si128((void *)(rxdp + 7)); - rte_compiler_barrier(); - const __m128i raw_desc6 = _mm_load_si128((void *)(rxdp + 6)); - rte_compiler_barrier(); - const __m128i raw_desc5 = _mm_load_si128((void *)(rxdp + 5)); - rte_compiler_barrier(); - const __m128i raw_desc4 = _mm_load_si128((void *)(rxdp + 4)); - rte_compiler_barrier(); - const __m128i raw_desc3 = _mm_load_si128((void *)(rxdp + 3)); - rte_compiler_barrier(); - const __m128i raw_desc2 = _mm_load_si128((void *)(rxdp + 2)); - rte_compiler_barrier(); - const __m128i raw_desc1 = _mm_load_si128((void *)(rxdp + 1)); - rte_compiler_barrier(); - const __m128i raw_desc0 = _mm_load_si128((void *)(rxdp + 0)); - - raw_desc6_7 = _mm256_inserti128_si256( - _mm256_castsi128_si256(raw_desc6), raw_desc7, 1); - raw_desc4_5 = _mm256_inserti128_si256( - _mm256_castsi128_si256(raw_desc4), raw_desc5, 1); - raw_desc2_3 = _mm256_inserti128_si256( - _mm256_castsi128_si256(raw_desc2), raw_desc3, 1); - raw_desc0_1 = _mm256_inserti128_si256( - _mm256_castsi128_si256(raw_desc0), raw_desc1, 1); - } while (0); + const __m128i raw_desc7 = _mm_load_si128((void *)(rxdp + 7)); + rte_compiler_barrier(); + const __m128i raw_desc6 = _mm_load_si128((void *)(rxdp + 6)); + rte_compiler_barrier(); + const __m128i raw_desc5 = _mm_load_si128((void *)(rxdp + 5)); + rte_compiler_barrier(); + const __m128i raw_desc4 = _mm_load_si128((void *)(rxdp + 4)); + rte_compiler_barrier(); + const __m128i raw_desc3 = _mm_load_si128((void *)(rxdp + 3)); + rte_compiler_barrier(); + const __m128i raw_desc2 = _mm_load_si128((void *)(rxdp + 2)); + rte_compiler_barrier(); + const __m128i raw_desc1 = _mm_load_si128((void *)(rxdp + 1)); + rte_compiler_barrier(); + const __m128i raw_desc0 = _mm_load_si128((void *)(rxdp + 0)); + + const __m256i raw_desc6_7 = _mm256_inserti128_si256( + _mm256_castsi128_si256(raw_desc6), raw_desc7, 1); + const __m256i raw_desc4_5 = _mm256_inserti128_si256( + _mm256_castsi128_si256(raw_desc4), raw_desc5, 1); + const __m256i raw_desc2_3 = _mm256_inserti128_si256( + _mm256_castsi128_si256(raw_desc2), raw_desc3, 1); + const __m256i raw_desc0_1 = _mm256_inserti128_si256( + _mm256_castsi128_si256(raw_desc0), raw_desc1, 1); if (split_packet) { int j;