From patchwork Fri Nov 3 17:52:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sevincer, Abdullah" X-Patchwork-Id: 133850 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3E7174327C; Fri, 3 Nov 2023 18:53:22 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 56A12402F2; Fri, 3 Nov 2023 18:53:20 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by mails.dpdk.org (Postfix) with ESMTP id 30F2340EA5; Fri, 3 Nov 2023 18:53:19 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1699033999; x=1730569999; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=dXNAKnwN1DvRTGvymjA9Q++1t2gkSmD1qgT3FaqB3jM=; b=aZ5l+6Tr00s9vKXJ0tq90ND/H9S2pfZoTF7Bm0Z7G2NXloyg1e2wSMbK gfpxJ6/wXr3I4IGzlHf2Th3clKPvb6xY832U7RVUNpImrf20DjITAf7K1 QsN9IoM081WbsDz3sCWWU7SBNtjAzJsvnMRseSLPjfVHheiVIO6T93qwi M+xYc7TVevEHtHQX6aylVBqQS0l40UMNbGPUnBQL4c+UNfXaB07z4fAol uWllJ3AahYBLxhxDPW5AfFE8MN8dlQnV5FogpXfTIc0RveELpCCa/vJUy boeyeUElB4aWzQX7zFg/twXtXvipEI/9wFRlwPDYGXmlv1Df+EqNmGatw Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10883"; a="1874444" X-IronPort-AV: E=Sophos;i="6.03,273,1694761200"; d="scan'208";a="1874444" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Nov 2023 10:53:18 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10883"; a="827560681" X-IronPort-AV: E=Sophos;i="6.03,273,1694761200"; d="scan'208";a="827560681" Received: from txanpdk02.an.intel.com ([10.123.117.76]) by fmsmga008.fm.intel.com with ESMTP; 03 Nov 2023 10:53:18 -0700 From: Abdullah Sevincer To: dev@dpdk.org Cc: jerinj@marvell.com, mike.ximing.chen@intel.com, bruce.richardson@intel.com, thomas@monjalon.net, Abdullah Sevincer , stable@dpdk.org Subject: [PATCH v5 2/2] event/dlb2: fix disable PASID Date: Fri, 3 Nov 2023 12:52:04 -0500 Message-Id: <20231103175204.2812654-3-abdullah.sevincer@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231103175204.2812654-1-abdullah.sevincer@intel.com> References: <20231103175204.2812654-1-abdullah.sevincer@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org In vfio-pci driver when PASID is enabled by default DLB hardware puts DLB in SIOV mode. This breaks DLB PF-PMD mode. For DLB PF-PMD mode to function properly PASID needs to be disabled. In this commit this issue is addressed and PASID is disabled by writing a zero to PASID control register. Fixes: 5433956d5185 ("event/dlb2: add eventdev probe") Cc: stable@dpdk.org Signed-off-by: Abdullah Sevincer --- drivers/event/dlb2/pf/dlb2_main.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/event/dlb2/pf/dlb2_main.c b/drivers/event/dlb2/pf/dlb2_main.c index aa03e4c311..843fe215aa 100644 --- a/drivers/event/dlb2/pf/dlb2_main.c +++ b/drivers/event/dlb2/pf/dlb2_main.c @@ -514,6 +514,16 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev) } } + /* Disable PASID if it is enabled by default, which + * breaks the DLB if enabled. + */ + off = RTE_PCI_PASID_CAP_OFFSET + RTE_PCI_PASID_CTRL; + if (rte_pci_set_pasid(pdev, off, false)) { + DLB2_LOG_ERR("[%s()] failed to write the pcie config space at offset %d\n", + __func__, (int)off); + return -1; + } + return 0; }