From patchwork Thu Sep 21 11:48:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tejasree Kondoj X-Patchwork-Id: 131781 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1E350425FF; Thu, 21 Sep 2023 13:48:40 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C251240E2D; Thu, 21 Sep 2023 13:48:32 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 0A32640E01 for ; Thu, 21 Sep 2023 13:48:31 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 38LBSFf7018686 for ; Thu, 21 Sep 2023 04:48:31 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=T1K/BejX5dVN5CgI0PExUy33otbgOpAQC+oOa+pMa04=; b=TuVkLjNLOZWiAuCcZHEgWoq65pNuJ6Fe/OJe6GPizKoWObo+yprSJ+G1wAT+CPyLmq/1 eutDzASzUy6tQ0C62B1O9XfwqpKvMdwBa0IPeTBJUm1wbc5LoX2pArXwe6BZ6bJbrYVB q0P/mcU7TkrVxG165veEA3jDdNvM15ZZ+vBdBKeR5hFOsIl6BIb1bJQXpVclpfjUaBJg 81fipGtBq+GYFFC58knbd0/ncPxsC7SxYvDSiz00f2OGzjhaekV+hkxbgxg5rwjRnmpL 2Key+DGuqqXLHfyrryInvXSpWx6vWzuawc1DmuK8LL9R5WFPL3NoxP0kJEBanPkc3Krx RA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3t85ptu0cv-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 21 Sep 2023 04:48:31 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Thu, 21 Sep 2023 04:48:29 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Thu, 21 Sep 2023 04:48:29 -0700 Received: from hyd1554.marvell.com (unknown [10.29.57.11]) by maili.marvell.com (Postfix) with ESMTP id C96FD5B6948; Thu, 21 Sep 2023 04:48:26 -0700 (PDT) From: Tejasree Kondoj To: Akhil Goyal CC: Vidya Sagar Velumuri , Anoob Joseph , Aakash Sasidharan , Gowrishankar Muthukrishnan , Subject: [PATCH 02/15] common/cnxk: update SE context fields to match ucode spec Date: Thu, 21 Sep 2023 17:18:07 +0530 Message-ID: <20230921114820.2526810-3-ktejasree@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230921114820.2526810-1-ktejasree@marvell.com> References: <20230921114820.2526810-1-ktejasree@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: UjqnxU_2WADOW7HIl6iCF-8i9D1_LNT_ X-Proofpoint-ORIG-GUID: UjqnxU_2WADOW7HIl6iCF-8i9D1_LNT_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-09-21_09,2023-09-21_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Vidya Sagar Velumuri Update the fields in SE context and rename to keep it in sync with microcode spec. Signed-off-by: Vidya Sagar Velumuri --- drivers/common/cnxk/roc_se.h | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/common/cnxk/roc_se.h b/drivers/common/cnxk/roc_se.h index 008ab31912..d540d70616 100644 --- a/drivers/common/cnxk/roc_se.h +++ b/drivers/common/cnxk/roc_se.h @@ -183,13 +183,15 @@ typedef enum { struct roc_se_enc_context { uint64_t iv_source : 1; uint64_t aes_key : 2; - uint64_t rsvd_60 : 1; + uint64_t rsvd_59 : 1; uint64_t enc_cipher : 4; uint64_t auth_input_type : 1; - uint64_t rsvd_52_54 : 3; + uint64_t auth_key_src : 1; + uint64_t rsvd_50_51 : 2; uint64_t hash_type : 4; uint64_t mac_len : 8; - uint64_t rsvd_39_0 : 40; + uint64_t rsvd_16_39 : 24; + uint64_t hmac_key_sz : 16; uint8_t encr_key[32]; uint8_t encr_iv[16]; };