From patchwork Wed Sep 20 06:22:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simei Su X-Patchwork-Id: 131665 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 243BC425E9; Wed, 20 Sep 2023 08:23:10 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A8E8440E2D; Wed, 20 Sep 2023 08:22:37 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.43]) by mails.dpdk.org (Postfix) with ESMTP id BFC7A40DFD for ; Wed, 20 Sep 2023 08:22:35 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695190955; x=1726726955; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2YADc4NirdxRm8Nym/PH3jVe9h4hmbfH8HqDCLfJqVA=; b=ZXLmo5Z30xbBVRrDTJE23wbzz9kq3/QdKORpLnxIgQTDwYxvMTTzFftl bgs+7V4QkleNOwx3OmncNag6RCwQsMJlSvjWDveMCenBo/NDduHcR5PCk taLc4QNcCl6AxxGCS6ztWWuIdcy8AG3c2vEkQYWCcObLlQCXPzswhaBGG AB9sgZJs7JLqX5HpQ5ZTsDqhSq2EDqRSxsA4c9aA5zp077MxnI5f65ndm 70iFh46XTLFYAZ0GSvcbh+qXIMwTdxkSjIoYQGMm9kBXBvNepQGMozYee Y4zecRy+Yu8waP0uofBBrg0vqrKQl4Fft1HBIjf7DCIryDON91tUCCVd+ A==; X-IronPort-AV: E=McAfee;i="6600,9927,10838"; a="466453269" X-IronPort-AV: E=Sophos;i="6.02,161,1688454000"; d="scan'208";a="466453269" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Sep 2023 23:22:35 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10838"; a="920154732" X-IronPort-AV: E=Sophos;i="6.02,161,1688454000"; d="scan'208";a="920154732" Received: from dpdk-simei-icelake.sh.intel.com ([10.67.110.167]) by orsmga005.jf.intel.com with ESMTP; 19 Sep 2023 23:22:32 -0700 From: Simei Su To: jingjing.wu@intel.com, beilei.xing@intel.com, qi.z.zhang@intel.com Cc: dev@dpdk.org, wenjun1.wu@intel.com, mingxia.liu@intel.com, wenjing.qiao@intel.com, Simei Su , Pavan Kumar Linga Subject: [PATCH v5 08/11] common/idpf/base: refine code and alignments Date: Wed, 20 Sep 2023 14:22:33 +0800 Message-Id: <20230920062236.375308-9-simei.su@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230920062236.375308-1-simei.su@intel.com> References: <20230918021130.192982-1-simei.su@intel.com> <20230920062236.375308-1-simei.su@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org a) Refine double pointer with a local pointer. b) Refine return type for function instead of only returning success. c) Remove unnecessary check and comments. d) Use tab spaces and new lines wherever necessary. Signed-off-by: Pavan Kumar Linga Signed-off-by: Simei Su Acked-by: Beilei Xing --- drivers/common/idpf/base/idpf_common.c | 4 +- drivers/common/idpf/base/idpf_controlq.c | 64 +++++++++---------- drivers/common/idpf/base/idpf_controlq_api.h | 12 +--- .../common/idpf/base/idpf_controlq_setup.c | 5 +- drivers/common/idpf/base/idpf_lan_pf_regs.h | 7 +- drivers/common/idpf/base/idpf_lan_txrx.h | 46 ++++++------- drivers/common/idpf/base/idpf_lan_vf_regs.h | 25 +++++--- drivers/common/idpf/base/idpf_prototype.h | 2 +- 8 files changed, 80 insertions(+), 85 deletions(-) diff --git a/drivers/common/idpf/base/idpf_common.c b/drivers/common/idpf/base/idpf_common.c index 9610916aa9..7181a7f14c 100644 --- a/drivers/common/idpf/base/idpf_common.c +++ b/drivers/common/idpf/base/idpf_common.c @@ -262,12 +262,12 @@ int idpf_clean_arq_element(struct idpf_hw *hw, * idpf_deinit_hw - shutdown routine * @hw: pointer to the hardware structure */ -int idpf_deinit_hw(struct idpf_hw *hw) +void idpf_deinit_hw(struct idpf_hw *hw) { hw->asq = NULL; hw->arq = NULL; - return idpf_ctlq_deinit(hw); + idpf_ctlq_deinit(hw); } /** diff --git a/drivers/common/idpf/base/idpf_controlq.c b/drivers/common/idpf/base/idpf_controlq.c index 6815153e1d..a82ca628de 100644 --- a/drivers/common/idpf/base/idpf_controlq.c +++ b/drivers/common/idpf/base/idpf_controlq.c @@ -9,11 +9,10 @@ * @cq: pointer to the specific control queue * @q_create_info: structs containing info for each queue to be initialized */ -static void -idpf_ctlq_setup_regs(struct idpf_ctlq_info *cq, - struct idpf_ctlq_create_info *q_create_info) +static void idpf_ctlq_setup_regs(struct idpf_ctlq_info *cq, + struct idpf_ctlq_create_info *q_create_info) { - /* set head and tail registers in our local struct */ + /* set control queue registers in our local struct */ cq->reg.head = q_create_info->reg.head; cq->reg.tail = q_create_info->reg.tail; cq->reg.len = q_create_info->reg.len; @@ -75,7 +74,7 @@ static void idpf_ctlq_init_rxq_bufs(struct idpf_ctlq_info *cq) desc->flags = CPU_TO_LE16(IDPF_CTLQ_FLAG_BUF | IDPF_CTLQ_FLAG_RD); desc->opcode = 0; - desc->datalen = (__le16)CPU_TO_LE16(bi->size); + desc->datalen = CPU_TO_LE16(bi->size); desc->ret_val = 0; desc->cookie_high = 0; desc->cookie_low = 0; @@ -137,6 +136,7 @@ int idpf_ctlq_add(struct idpf_hw *hw, struct idpf_ctlq_create_info *qinfo, struct idpf_ctlq_info **cq_out) { + struct idpf_ctlq_info *cq; bool is_rxq = false; int status = 0; @@ -145,26 +145,26 @@ int idpf_ctlq_add(struct idpf_hw *hw, qinfo->buf_size > IDPF_CTLQ_MAX_BUF_LEN) return -EINVAL; - *cq_out = (struct idpf_ctlq_info *) - idpf_calloc(hw, 1, sizeof(struct idpf_ctlq_info)); - if (!(*cq_out)) + cq = (struct idpf_ctlq_info *) + idpf_calloc(hw, 1, sizeof(struct idpf_ctlq_info)); + if (!cq) return -ENOMEM; - (*cq_out)->cq_type = qinfo->type; - (*cq_out)->q_id = qinfo->id; - (*cq_out)->buf_size = qinfo->buf_size; - (*cq_out)->ring_size = qinfo->len; + cq->cq_type = qinfo->type; + cq->q_id = qinfo->id; + cq->buf_size = qinfo->buf_size; + cq->ring_size = qinfo->len; - (*cq_out)->next_to_use = 0; - (*cq_out)->next_to_clean = 0; - (*cq_out)->next_to_post = (*cq_out)->ring_size - 1; + cq->next_to_use = 0; + cq->next_to_clean = 0; + cq->next_to_post = cq->ring_size - 1; switch (qinfo->type) { case IDPF_CTLQ_TYPE_MAILBOX_RX: is_rxq = true; /* fallthrough */ case IDPF_CTLQ_TYPE_MAILBOX_TX: - status = idpf_ctlq_alloc_ring_res(hw, *cq_out); + status = idpf_ctlq_alloc_ring_res(hw, cq); break; default: status = -EINVAL; @@ -175,33 +175,35 @@ int idpf_ctlq_add(struct idpf_hw *hw, goto init_free_q; if (is_rxq) { - idpf_ctlq_init_rxq_bufs(*cq_out); + idpf_ctlq_init_rxq_bufs(cq); } else { /* Allocate the array of msg pointers for TX queues */ - (*cq_out)->bi.tx_msg = (struct idpf_ctlq_msg **) + cq->bi.tx_msg = (struct idpf_ctlq_msg **) idpf_calloc(hw, qinfo->len, sizeof(struct idpf_ctlq_msg *)); - if (!(*cq_out)->bi.tx_msg) { + if (!cq->bi.tx_msg) { status = -ENOMEM; goto init_dealloc_q_mem; } } - idpf_ctlq_setup_regs(*cq_out, qinfo); + idpf_ctlq_setup_regs(cq, qinfo); - idpf_ctlq_init_regs(hw, *cq_out, is_rxq); + idpf_ctlq_init_regs(hw, cq, is_rxq); - idpf_init_lock(&(*cq_out)->cq_lock); + idpf_init_lock(&(cq->cq_lock)); - LIST_INSERT_HEAD(&hw->cq_list_head, (*cq_out), cq_list); + LIST_INSERT_HEAD(&hw->cq_list_head, cq, cq_list); + *cq_out = cq; return status; init_dealloc_q_mem: /* free ring buffers and the ring itself */ - idpf_ctlq_dealloc_ring_res(hw, *cq_out); + idpf_ctlq_dealloc_ring_res(hw, cq); init_free_q: - idpf_free(hw, *cq_out); + idpf_free(hw, cq); + cq = NULL; return status; } @@ -261,16 +263,13 @@ int idpf_ctlq_init(struct idpf_hw *hw, u8 num_q, * idpf_ctlq_deinit - destroy all control queues * @hw: pointer to hw struct */ -int idpf_ctlq_deinit(struct idpf_hw *hw) +void idpf_ctlq_deinit(struct idpf_hw *hw) { struct idpf_ctlq_info *cq = NULL, *tmp = NULL; - int ret_code = 0; LIST_FOR_EACH_ENTRY_SAFE(cq, tmp, &hw->cq_list_head, idpf_ctlq_info, cq_list) idpf_ctlq_remove(hw, cq); - - return ret_code; } /** @@ -426,11 +425,8 @@ static int __idpf_ctlq_clean_sq(struct idpf_ctlq_info *cq, u16 *clean_count, if (!force && !(LE16_TO_CPU(desc->flags) & IDPF_CTLQ_FLAG_DD)) break; - desc_err = LE16_TO_CPU(desc->ret_val); - if (desc_err) { - /* strip off FW internal code */ - desc_err &= 0xff; - } + /* strip off FW internal code */ + desc_err = LE16_TO_CPU(desc->ret_val) & 0xff; msg_status[i] = cq->bi.tx_msg[ntc]; if (!msg_status[i]) diff --git a/drivers/common/idpf/base/idpf_controlq_api.h b/drivers/common/idpf/base/idpf_controlq_api.h index f4e7b53ac9..38f5d2df3c 100644 --- a/drivers/common/idpf/base/idpf_controlq_api.h +++ b/drivers/common/idpf/base/idpf_controlq_api.h @@ -21,10 +21,7 @@ enum idpf_ctlq_type { IDPF_CTLQ_TYPE_RDMA_COMPL = 7 }; -/* - * Generic Control Queue Structures - */ - +/* Generic Control Queue Structures */ struct idpf_ctlq_reg { /* used for queue tracking */ u32 head; @@ -157,10 +154,7 @@ enum idpf_mbx_opc { idpf_mbq_opc_send_msg_to_peer_drv = 0x0804, }; -/* - * API supported for control queue management - */ - +/* API supported for control queue management */ /* Will init all required q including default mb. "q_info" is an array of * create_info structs equal to the number of control queues to be created. */ @@ -205,6 +199,6 @@ int idpf_ctlq_post_rx_buffs(struct idpf_hw *hw, struct idpf_dma_mem **buffs); /* Will destroy all q including the default mb */ -int idpf_ctlq_deinit(struct idpf_hw *hw); +void idpf_ctlq_deinit(struct idpf_hw *hw); #endif /* _IDPF_CONTROLQ_API_H_ */ diff --git a/drivers/common/idpf/base/idpf_controlq_setup.c b/drivers/common/idpf/base/idpf_controlq_setup.c index 0f1b52a7e9..21f43c74f5 100644 --- a/drivers/common/idpf/base/idpf_controlq_setup.c +++ b/drivers/common/idpf/base/idpf_controlq_setup.c @@ -11,9 +11,8 @@ * @hw: pointer to hw struct * @cq: pointer to the specific Control queue */ -static int -idpf_ctlq_alloc_desc_ring(struct idpf_hw *hw, - struct idpf_ctlq_info *cq) +static int idpf_ctlq_alloc_desc_ring(struct idpf_hw *hw, + struct idpf_ctlq_info *cq) { size_t size = cq->ring_size * sizeof(struct idpf_ctlq_desc); diff --git a/drivers/common/idpf/base/idpf_lan_pf_regs.h b/drivers/common/idpf/base/idpf_lan_pf_regs.h index 8542620e01..eab23f279a 100644 --- a/drivers/common/idpf/base/idpf_lan_pf_regs.h +++ b/drivers/common/idpf/base/idpf_lan_pf_regs.h @@ -80,10 +80,11 @@ /* _ITR is ITR index, _INT is interrupt index, _itrn_indx_spacing is * spacing b/w itrn registers of the same vector. */ -#define PF_GLINT_ITR_ADDR(_ITR, _reg_start, _itrn_indx_spacing) \ - ((_reg_start) + (((_ITR)) * (_itrn_indx_spacing))) +#define PF_GLINT_ITR_ADDR(_ITR, _reg_start, _itrn_indx_spacing) \ + ((_reg_start) + ((_ITR) * (_itrn_indx_spacing))) /* For PF, itrn_indx_spacing is 4 and itrn_reg_spacing is 0x1000 */ -#define PF_GLINT_ITR(_ITR, _INT) (PF_GLINT_BASE + (((_ITR) + 1) * 4) + ((_INT) * 0x1000)) +#define PF_GLINT_ITR(_ITR, _INT) \ + (PF_GLINT_BASE + (((_ITR) + 1) * 4) + ((_INT) * 0x1000)) #define PF_GLINT_ITR_MAX_INDEX 2 #define PF_GLINT_ITR_INTERVAL_S 0 #define PF_GLINT_ITR_INTERVAL_M IDPF_M(0xFFF, PF_GLINT_ITR_INTERVAL_S) diff --git a/drivers/common/idpf/base/idpf_lan_txrx.h b/drivers/common/idpf/base/idpf_lan_txrx.h index 7b03693eb1..aec6422c15 100644 --- a/drivers/common/idpf/base/idpf_lan_txrx.h +++ b/drivers/common/idpf/base/idpf_lan_txrx.h @@ -8,9 +8,9 @@ #include "idpf_osdep.h" enum idpf_rss_hash { - /* Values 0 - 28 are reserved for future use */ - IDPF_HASH_INVALID = 0, - IDPF_HASH_NONF_UNICAST_IPV4_UDP = 29, + IDPF_HASH_INVALID = 0, + /* Values 1 - 28 are reserved for future use */ + IDPF_HASH_NONF_UNICAST_IPV4_UDP = 29, IDPF_HASH_NONF_MULTICAST_IPV4_UDP, IDPF_HASH_NONF_IPV4_UDP, IDPF_HASH_NONF_IPV4_TCP_SYN_NO_ACK, @@ -19,7 +19,7 @@ enum idpf_rss_hash { IDPF_HASH_NONF_IPV4_OTHER, IDPF_HASH_FRAG_IPV4, /* Values 37-38 are reserved */ - IDPF_HASH_NONF_UNICAST_IPV6_UDP = 39, + IDPF_HASH_NONF_UNICAST_IPV6_UDP = 39, IDPF_HASH_NONF_MULTICAST_IPV6_UDP, IDPF_HASH_NONF_IPV6_UDP, IDPF_HASH_NONF_IPV6_TCP_SYN_NO_ACK, @@ -32,34 +32,30 @@ enum idpf_rss_hash { IDPF_HASH_NONF_FCOE_RX, IDPF_HASH_NONF_FCOE_OTHER, /* Values 51-62 are reserved */ - IDPF_HASH_L2_PAYLOAD = 63, + IDPF_HASH_L2_PAYLOAD = 63, IDPF_HASH_MAX }; /* Supported RSS offloads */ -#define IDPF_DEFAULT_RSS_HASH ( \ - BIT_ULL(IDPF_HASH_NONF_IPV4_UDP) | \ - BIT_ULL(IDPF_HASH_NONF_IPV4_SCTP) | \ - BIT_ULL(IDPF_HASH_NONF_IPV4_TCP) | \ - BIT_ULL(IDPF_HASH_NONF_IPV4_OTHER) | \ - BIT_ULL(IDPF_HASH_FRAG_IPV4) | \ - BIT_ULL(IDPF_HASH_NONF_IPV6_UDP) | \ - BIT_ULL(IDPF_HASH_NONF_IPV6_TCP) | \ - BIT_ULL(IDPF_HASH_NONF_IPV6_SCTP) | \ - BIT_ULL(IDPF_HASH_NONF_IPV6_OTHER) | \ - BIT_ULL(IDPF_HASH_FRAG_IPV6) | \ +#define IDPF_DEFAULT_RSS_HASH \ + (BIT_ULL(IDPF_HASH_NONF_IPV4_UDP) | \ + BIT_ULL(IDPF_HASH_NONF_IPV4_SCTP) | \ + BIT_ULL(IDPF_HASH_NONF_IPV4_TCP) | \ + BIT_ULL(IDPF_HASH_NONF_IPV4_OTHER) | \ + BIT_ULL(IDPF_HASH_FRAG_IPV4) | \ + BIT_ULL(IDPF_HASH_NONF_IPV6_UDP) | \ + BIT_ULL(IDPF_HASH_NONF_IPV6_TCP) | \ + BIT_ULL(IDPF_HASH_NONF_IPV6_SCTP) | \ + BIT_ULL(IDPF_HASH_NONF_IPV6_OTHER) | \ + BIT_ULL(IDPF_HASH_FRAG_IPV6) | \ BIT_ULL(IDPF_HASH_L2_PAYLOAD)) - /* TODO: Wrap below comment under internal flag - * Below 6 pcktypes are not supported by FVL or older products - * They are supported by FPK and future products - */ #define IDPF_DEFAULT_RSS_HASH_EXPANDED (IDPF_DEFAULT_RSS_HASH | \ - BIT_ULL(IDPF_HASH_NONF_IPV4_TCP_SYN_NO_ACK) | \ - BIT_ULL(IDPF_HASH_NONF_UNICAST_IPV4_UDP) | \ - BIT_ULL(IDPF_HASH_NONF_MULTICAST_IPV4_UDP) | \ - BIT_ULL(IDPF_HASH_NONF_IPV6_TCP_SYN_NO_ACK) | \ - BIT_ULL(IDPF_HASH_NONF_UNICAST_IPV6_UDP) | \ + BIT_ULL(IDPF_HASH_NONF_IPV4_TCP_SYN_NO_ACK) | \ + BIT_ULL(IDPF_HASH_NONF_UNICAST_IPV4_UDP) | \ + BIT_ULL(IDPF_HASH_NONF_MULTICAST_IPV4_UDP) | \ + BIT_ULL(IDPF_HASH_NONF_IPV6_TCP_SYN_NO_ACK) | \ + BIT_ULL(IDPF_HASH_NONF_UNICAST_IPV6_UDP) | \ BIT_ULL(IDPF_HASH_NONF_MULTICAST_IPV6_UDP)) /* For idpf_splitq_base_tx_compl_desc */ diff --git a/drivers/common/idpf/base/idpf_lan_vf_regs.h b/drivers/common/idpf/base/idpf_lan_vf_regs.h index b5ff9b2cc9..2caa07fdfd 100644 --- a/drivers/common/idpf/base/idpf_lan_vf_regs.h +++ b/drivers/common/idpf/base/idpf_lan_vf_regs.h @@ -94,14 +94,23 @@ * b/w itrn registers of the same vector */ #define VF_INT_ITR0(_ITR) (0x00004C00 + ((_ITR) * 4)) -#define VF_INT_ITRN_ADDR(_ITR, _reg_start, _itrn_indx_spacing) \ - ((_reg_start) + (((_ITR)) * (_itrn_indx_spacing))) -/* For VF with 16 vector support, itrn_reg_spacing is 0x4 and itrn_indx_spacing is 0x40 */ -#define VF_INT_ITRN(_INT, _ITR) (0x00002800 + ((_INT) * 4) + ((_ITR) * 0x40)) -/* For VF with 64 vector support, itrn_reg_spacing is 0x4 and itrn_indx_spacing is 0x100 */ -#define VF_INT_ITRN_64(_INT, _ITR) (0x00002C00 + ((_INT) * 4) + ((_ITR) * 0x100)) -/* For VF with 2k vector support, itrn_reg_spacing is 0x4 and itrn_indx_spacing is 0x2000 */ -#define VF_INT_ITRN_2K(_INT, _ITR) (0x00072000 + ((_INT) * 4) + ((_ITR) * 0x2000)) +#define VF_INT_ITRN_ADDR(_ITR, _reg_start, _itrn_indx_spacing) \ + ((_reg_start) + ((_ITR) * (_itrn_indx_spacing))) +/* For VF with 16 vector support, itrn_reg_spacing is 0x4, itrn_indx_spacing + * is 0x40 and base register offset is 0x00002800 + */ +#define VF_INT_ITRN(_INT, _ITR) \ + (0x00002800 + ((_INT) * 4) + ((_ITR) * 0x40)) +/* For VF with 64 vector support, itrn_reg_spacing is 0x4, itrn_indx_spacing + * is 0x100 and base register offset is 0x00002C00 + */ +#define VF_INT_ITRN_64(_INT, _ITR) \ + (0x00002C00 + ((_INT) * 4) + ((_ITR) * 0x100)) +/* For VF with 2k vector support, itrn_reg_spacing is 0x4, itrn_indx_spacing + * is 0x2000 and base register offset is 0x00072000 + */ +#define VF_INT_ITRN_2K(_INT, _ITR) \ + (0x00072000 + ((_INT) * 4) + ((_ITR) * 0x2000)) #define VF_INT_ITRN_MAX_INDEX 2 #define VF_INT_ITRN_INTERVAL_S 0 #define VF_INT_ITRN_INTERVAL_M IDPF_M(0xFFF, VF_INT_ITRN_INTERVAL_S) diff --git a/drivers/common/idpf/base/idpf_prototype.h b/drivers/common/idpf/base/idpf_prototype.h index 988ff00506..e2f090a9e3 100644 --- a/drivers/common/idpf/base/idpf_prototype.h +++ b/drivers/common/idpf/base/idpf_prototype.h @@ -20,7 +20,7 @@ #define APF int idpf_init_hw(struct idpf_hw *hw, struct idpf_ctlq_size ctlq_size); -int idpf_deinit_hw(struct idpf_hw *hw); +void idpf_deinit_hw(struct idpf_hw *hw); int idpf_clean_arq_element(struct idpf_hw *hw, struct idpf_arq_event_info *e,