From patchwork Mon Sep 18 11:40:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Bhansali X-Patchwork-Id: 131562 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C17B0425D0; Mon, 18 Sep 2023 13:40:48 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 35A1840263; Mon, 18 Sep 2023 13:40:48 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 45CED4021F for ; Mon, 18 Sep 2023 13:40:46 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 38I0L2cX005255 for ; Mon, 18 Sep 2023 04:40:45 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=WaF+vR4ZcD/QI5pe0AXb6YdskjrGae88EBDs3csd0w0=; b=FE+jmn+L8vbb1JJ8UZCWX9okkm8yV6Q0ThSHwXD1Uf0PsZYEOJFYOwI547qDLetREuW/ QU70NToRhDJpFC0hzEtHehz09ewYLYXh0QcU4j1BCS/h+xaRG3L9yh6sTErAa9XBmNhM r/8F6LGZquz/prJtEK7x60XlFIIDwnF2KDjPlplyazuknV8VcqClcxfaiBF2mPyTjYHI gLzGNgzkxyVD2W1i6UY3TiGZ6p/AulKJaJ26iQUqHs+47DACB0FWLpS+G92uxEErVqdg 1UBzq9Weliruk/CNahWgJrl8RTrfj2EL1S4L9qfY15DZzaqDacjMY18siUjDKyWnQQYN Ww== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3t59qpv5jb-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 18 Sep 2023 04:40:45 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Mon, 18 Sep 2023 04:40:43 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Mon, 18 Sep 2023 04:40:43 -0700 Received: from localhost.localdomain (unknown [10.28.36.158]) by maili.marvell.com (Postfix) with ESMTP id 2DDED5B6921; Mon, 18 Sep 2023 04:40:40 -0700 (PDT) From: Rahul Bhansali To: , Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , Rahul Bhansali Subject: [PATCH 1/2] common/cnxk: reserve last LMT line for control ops Date: Mon, 18 Sep 2023 17:10:34 +0530 Message-ID: <20230918114035.751407-1-rbhansali@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: Ov3Xy-OTINgKg0OExJEu8bkEY6d6uhlW X-Proofpoint-GUID: Ov3Xy-OTINgKg0OExJEu8bkEY6d6uhlW X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.601,FMLib:17.11.176.26 definitions=2023-09-18_04,2023-09-18_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org As rte_eth_dev_configure() can be called from any EAL or non-EAL cores. And in case of non-EAL core, LMT address will not be a valid. So, reserving last LMT line 2047 for control path specific functionality. Signed-off-by: Rahul Bhansali --- drivers/common/cnxk/roc_dev.c | 5 +++++ drivers/common/cnxk/roc_nix_inl.c | 6 ++++-- drivers/common/cnxk/roc_platform.c | 25 +++++++++++++++++++++++++ drivers/common/cnxk/roc_platform.h | 5 +++++ drivers/common/cnxk/version.map | 2 ++ 5 files changed, 41 insertions(+), 2 deletions(-) diff --git a/drivers/common/cnxk/roc_dev.c b/drivers/common/cnxk/roc_dev.c index 18d7981825..3815da078a 100644 --- a/drivers/common/cnxk/roc_dev.c +++ b/drivers/common/cnxk/roc_dev.c @@ -1369,6 +1369,11 @@ dev_init(struct dev *dev, struct plt_pci_device *pci_dev) if (!dev_cache_line_size_valid()) return -EFAULT; + if (!roc_plt_lmt_validate()) { + plt_err("Failed to validate LMT line"); + return -EFAULT; + } + bar2 = (uintptr_t)pci_dev->mem_resource[2].addr; bar4 = (uintptr_t)pci_dev->mem_resource[4].addr; if (bar2 == 0 || bar4 == 0) { diff --git a/drivers/common/cnxk/roc_nix_inl.c b/drivers/common/cnxk/roc_nix_inl.c index 5cb1f11f53..750fd08355 100644 --- a/drivers/common/cnxk/roc_nix_inl.c +++ b/drivers/common/cnxk/roc_nix_inl.c @@ -779,8 +779,10 @@ nix_inl_eng_caps_get(struct nix *nix) hw_res->cn10k.compcode = CPT_COMP_NOT_DONE; - /* Use this lcore's LMT line as no one else is using it */ - ROC_LMT_BASE_ID_GET(lmt_base, lmt_id); + /* Use this reserved LMT line as no one else is using it */ + lmt_id = roc_plt_control_lmt_id_get(); + lmt_base += ((uint64_t)lmt_id << ROC_LMT_LINE_SIZE_LOG2); + memcpy((void *)lmt_base, &inst, sizeof(inst)); lmt_arg = ROC_CN10K_CPT_LMT_ARG | (uint64_t)lmt_id; diff --git a/drivers/common/cnxk/roc_platform.c b/drivers/common/cnxk/roc_platform.c index f91b95ceab..ffc82720b0 100644 --- a/drivers/common/cnxk/roc_platform.c +++ b/drivers/common/cnxk/roc_platform.c @@ -21,6 +21,31 @@ roc_plt_init_cb_register(roc_plt_init_cb_t cb) return 0; } +uint16_t +roc_plt_control_lmt_id_get(void) +{ + uint32_t lcore_id = plt_lcore_id(); + if (lcore_id != LCORE_ID_ANY) + return lcore_id << ROC_LMT_LINES_PER_CORE_LOG2; + else + /* Return Last LMT ID to be use in control path functionality */ + return ROC_NUM_LMT_LINES - 1; +} + +uint16_t +roc_plt_lmt_validate(void) +{ + if (!roc_model_is_cn9k()) { + /* Last LMT line is reserved for control specific operation and can be + * use from any EAL or non EAL cores. + */ + if ((RTE_MAX_LCORE << ROC_LMT_LINES_PER_CORE_LOG2) > + (ROC_NUM_LMT_LINES - 1)) + return 0; + } + return 1; +} + int roc_plt_init(void) { diff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h index e7a6564163..7605eed33d 100644 --- a/drivers/common/cnxk/roc_platform.h +++ b/drivers/common/cnxk/roc_platform.h @@ -314,6 +314,11 @@ extern int cnxk_logtype_ree; __rte_internal int roc_plt_init(void); +__rte_internal +uint16_t roc_plt_control_lmt_id_get(void); +__rte_internal +uint16_t roc_plt_lmt_validate(void); + /* Init callbacks */ typedef int (*roc_plt_init_cb_t)(void); int __roc_api roc_plt_init_cb_register(roc_plt_init_cb_t cb); diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index 43c3d9ed77..04f8fabfcb 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -463,6 +463,8 @@ INTERNAL { roc_ot_ipsec_outb_sa_init; roc_plt_init; roc_plt_init_cb_register; + roc_plt_lmt_validate; + roc_plt_control_lmt_id_get; roc_sso_dev_fini; roc_sso_dev_init; roc_sso_dump;