From patchwork Thu Sep 14 01:50:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simei Su X-Patchwork-Id: 131406 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id ADFA64258F; Thu, 14 Sep 2023 03:49:59 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1D7F2402EE; Thu, 14 Sep 2023 03:49:52 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.20]) by mails.dpdk.org (Postfix) with ESMTP id 08CBF402DB for ; Thu, 14 Sep 2023 03:49:48 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1694656189; x=1726192189; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nOOvm9DpJtYvc0eafp8t0GfmPyK+PSOd5h+62YzPPX8=; b=kb1o7u6heHGXCRNLNJMtIED2CHu/EjpnBcMCLhUkIJxEaKc5DIHUzCKr ZpPJAZq00+egE9zw6exZSeG/MYyoztDk/BFTjO/1BrvMliw13JZcK3u8c qRJ5yHJ/2M10WeeFtzIGs3MZPU/HKU9pY8x3Ac1C9wE1GhsOdq1+eaLWF Oft8AZBQEOjqBRE/GWN0wbK//A0eyGFUFpca4vT+ZemnwXCg4bxeyj19B MDJh0KKntgYHzoj4+njTkMFJi/2taCp6xgQZ8m3sn0em1gwkwN+ZGjw3K 8i+AChYgR3ZELdR0PbaKHdWRz3gAjUjsSNV4uO6U/NqQ4qAqDQMX/9pTx w==; X-IronPort-AV: E=McAfee;i="6600,9927,10832"; a="369101413" X-IronPort-AV: E=Sophos;i="6.02,144,1688454000"; d="scan'208";a="369101413" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Sep 2023 18:49:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10832"; a="773699526" X-IronPort-AV: E=Sophos;i="6.02,144,1688454000"; d="scan'208";a="773699526" Received: from dpdk-simei-icelake.sh.intel.com ([10.67.110.167]) by orsmga008.jf.intel.com with ESMTP; 13 Sep 2023 18:49:45 -0700 From: Simei Su To: jingjing.wu@intel.com, beilei.xing@intel.com, qi.z.zhang@intel.com Cc: dev@dpdk.org, wenjun1.wu@intel.com, Simei Su Subject: [PATCH v4 2/3] net/idpf: refine Tx queue setup Date: Thu, 14 Sep 2023 09:50:30 +0800 Message-Id: <20230914015031.2560501-3-simei.su@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230914015031.2560501-1-simei.su@intel.com> References: <20230908102827.2256297-1-simei.su@intel.com> <20230914015031.2560501-1-simei.su@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch refines Tx single queue setup to align with Tx data path. Signed-off-by: Simei Su Acked-by: Wenjun Wu --- drivers/net/idpf/idpf_rxtx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/idpf/idpf_rxtx.c b/drivers/net/idpf/idpf_rxtx.c index 3e3d81ca6d..64f2235580 100644 --- a/drivers/net/idpf/idpf_rxtx.c +++ b/drivers/net/idpf/idpf_rxtx.c @@ -74,7 +74,7 @@ idpf_dma_zone_reserve(struct rte_eth_dev *dev, uint16_t queue_idx, ring_size = RTE_ALIGN(len * sizeof(struct idpf_flex_tx_sched_desc), IDPF_DMA_MEM_ALIGN); else - ring_size = RTE_ALIGN(len * sizeof(struct idpf_flex_tx_desc), + ring_size = RTE_ALIGN(len * sizeof(struct idpf_base_tx_desc), IDPF_DMA_MEM_ALIGN); rte_memcpy(ring_name, "idpf Tx ring", sizeof("idpf Tx ring")); break;