From patchwork Fri Aug 11 08:57:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 130134 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8E76843032; Fri, 11 Aug 2023 11:00:11 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5195643296; Fri, 11 Aug 2023 10:59:13 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 4C67943273 for ; Fri, 11 Aug 2023 10:59:12 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 37AMjx5e001610 for ; Fri, 11 Aug 2023 01:59:11 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=OLgRfEdjQ6y7bRjd5iHVG4Wte1g7joYmyT9Y3UoQ3oM=; b=ct2DkV1qGibDD6wCWXMXQu9ud/lW9Q21LuSvZ72t63tRANBNA95ih8mdH1ERr+KS26xU 8niJ5xvsq6jAK1XzYMRO8Zg/QO1dW7JN/VsMumLkDNxtqjZYcEANI5tIZr6Bhlx52zOS +gm/Sd27g3DqjaKjzwfSRiB4NkHctmhox7JAe637mejC5P0A1Soj4szY6pYao7eBd8sD y9rh98swpKwXuUTus5Rl3NOtUxEg38P67oSqw8+iidgXMDh8/Gieu7L+HI9b3YkBCvNg rGZtzXOosxRA5Mw8tQ5Ih3mvrn13K/IjzZB7pK+ANfROE/cjtg6affnNoyMF+Ni9v0MC ZA== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3sd8yp9rab-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 11 Aug 2023 01:59:11 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Fri, 11 Aug 2023 01:59:09 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Fri, 11 Aug 2023 01:59:09 -0700 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 4752F3F706A; Fri, 11 Aug 2023 01:59:07 -0700 (PDT) From: Nithin Dabilpuram To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , , Subject: [PATCH 20/31] net/cnxk: fix CQ allocation Date: Fri, 11 Aug 2023 14:27:54 +0530 Message-ID: <20230811085805.441256-20-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230811085805.441256-1-ndabilpuram@marvell.com> References: <20230811085805.441256-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: KeyMc6zpXdIAgPanxAXr-n4C9tjEis0i X-Proofpoint-GUID: KeyMc6zpXdIAgPanxAXr-n4C9tjEis0i X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-08-10_20,2023-08-10_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Satha Rao Allocate number of CQs sufficient to handle completions of both RQs and SQs. Fixes: dd9446991212 ("net/cnxk: add transmit completion handler") Cc: rkudurumalla@marvell.com Signed-off-by: Satha Rao --- drivers/net/cnxk/cnxk_ethdev.c | 26 +++++++++++--------------- 1 file changed, 11 insertions(+), 15 deletions(-) diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c index 4b98faa729..46450088eb 100644 --- a/drivers/net/cnxk/cnxk_ethdev.c +++ b/drivers/net/cnxk/cnxk_ethdev.c @@ -1197,8 +1197,8 @@ cnxk_nix_configure(struct rte_eth_dev *eth_dev) char ea_fmt[RTE_ETHER_ADDR_FMT_SIZE]; struct roc_nix_fc_cfg fc_cfg = {0}; struct roc_nix *nix = &dev->nix; + uint16_t nb_rxq, nb_txq, nb_cq; struct rte_ether_addr *ea; - uint16_t nb_rxq, nb_txq; uint64_t rx_cfg; void *qs; int rc; @@ -1309,6 +1309,9 @@ cnxk_nix_configure(struct rte_eth_dev *eth_dev) nb_rxq = data->nb_rx_queues; nb_txq = data->nb_tx_queues; + nb_cq = nb_rxq; + if (nix->tx_compl_ena) + nb_cq += nb_txq; rc = -ENOMEM; if (nb_rxq) { /* Allocate memory for roc rq's and cq's */ @@ -1318,13 +1321,6 @@ cnxk_nix_configure(struct rte_eth_dev *eth_dev) goto free_nix_lf; } dev->rqs = qs; - - qs = plt_zmalloc(sizeof(struct roc_nix_cq) * nb_rxq, 0); - if (!qs) { - plt_err("Failed to alloc cqs"); - goto free_nix_lf; - } - dev->cqs = qs; } if (nb_txq) { @@ -1335,15 +1331,15 @@ cnxk_nix_configure(struct rte_eth_dev *eth_dev) goto free_nix_lf; } dev->sqs = qs; + } - if (nix->tx_compl_ena) { - qs = plt_zmalloc(sizeof(struct roc_nix_cq) * nb_txq, 0); - if (!qs) { - plt_err("Failed to alloc cqs"); - goto free_nix_lf; - } - dev->cqs = qs; + if (nb_cq) { + qs = plt_zmalloc(sizeof(struct roc_nix_cq) * nb_cq, 0); + if (!qs) { + plt_err("Failed to alloc cqs"); + goto free_nix_lf; } + dev->cqs = qs; } /* Re-enable NIX LF error interrupts */