From patchwork Fri Aug 11 08:57:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 130130 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C23AD43032; Fri, 11 Aug 2023 10:59:47 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 529A943288; Fri, 11 Aug 2023 10:59:01 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id E3C1F43287 for ; Fri, 11 Aug 2023 10:58:59 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 37AMj870014471 for ; Fri, 11 Aug 2023 01:58:59 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=bPqrXv63AHkE7bn6qWxTnQ5/qpmO5RkASAwPpAzcYWo=; b=JalwuY/Y6qIPi7+zdl5rrtb3/ZP88Eo8iSQM0caYqiCr/FZh4sTiT0JDn6HRhS4lxKKd ZlTLQAoYpJqgJSiEpZmKK5WDYDv4bWd3Ee6o2OrnAxtCYrbYrMubr+q1MKJKzrVSoG41 ZVEDJeoGemi/kroC7pHGUT/BWVY5fak68pa7f70KVcxLTRVyjQ+5M3YFWIHkGEKPy/Lo bboioKzvckQ1pUEp2iilw2IakMG6kv+emzpGGPioLc0Z7UdwrnbtkDU7eYvVelOnB84R g4/5irPHJ8DOo6jJFWh427Bvh4Bj30UEyqSA49kdSYbaL8ilKZmvAYszxS+PDAgZ0xlA 6A== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3sd8ya1ga4-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 11 Aug 2023 01:58:59 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Fri, 11 Aug 2023 01:58:57 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Fri, 11 Aug 2023 01:58:57 -0700 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 0394F3F706A; Fri, 11 Aug 2023 01:58:54 -0700 (PDT) From: Nithin Dabilpuram To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , Subject: [PATCH 16/31] common/cnxk: allow same TC on multiple RQs Date: Fri, 11 Aug 2023 14:27:50 +0530 Message-ID: <20230811085805.441256-16-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230811085805.441256-1-ndabilpuram@marvell.com> References: <20230811085805.441256-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: bip1VuPZIF4dnAE-OXcGBc0Cf3kW0PTf X-Proofpoint-GUID: bip1VuPZIF4dnAE-OXcGBc0Cf3kW0PTf X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-08-10_20,2023-08-10_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Sunil Kumar Kori To achieve actual PFC behavior, user needs to configure different TC on different aura so that PFC can be generated for specific TC but same TC can also configured on multiple RQs which has same configured aura. In this patch, aura with same BP configuration is allowed on multiple RQs. Signed-off-by: Sunil Kumar Kori --- drivers/common/cnxk/roc_nix_fc.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/common/cnxk/roc_nix_fc.c b/drivers/common/cnxk/roc_nix_fc.c index 0f9b5cbbc0..2a58567751 100644 --- a/drivers/common/cnxk/roc_nix_fc.c +++ b/drivers/common/cnxk/roc_nix_fc.c @@ -501,7 +501,6 @@ roc_nix_fc_npa_bp_cfg(struct roc_nix *roc_nix, uint64_t pool_id, uint8_t ena, ui bpid = (aura_attr->bp_ena & 0x1) ? aura_attr->nix0_bpid : aura_attr->nix1_bpid; /* BP is already enabled. */ if (aura_attr->bp_ena && ena) { - /* Disable BP if BPIDs don't match and couldn't add new BPID. */ if (bpid != nix->bpid[tc]) { uint16_t bpid_new = NIX_BPID_INVALID; @@ -519,15 +518,13 @@ roc_nix_fc_npa_bp_cfg(struct roc_nix *roc_nix, uint64_t pool_id, uint8_t ena, ui plt_info("Ignoring port=%u tc=%u config on shared aura 0x%" PRIx64, roc_nix->port_id, tc, pool_id); } + } else { + aura_attr->ref_count++; } return; } - /* BP was previously enabled but now disabled skip. */ - if (aura_attr->bp && ena) - return; - if (ena) { if (roc_npa_aura_bp_configure(pool_id, nix->bpid[tc], bp_intf, bp_thresh, true)) plt_err("Enabling backpressue failed on aura 0x%" PRIx64, pool_id);