From patchwork Fri Aug 11 08:57:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 130127 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3088F43032; Fri, 11 Aug 2023 10:59:30 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E90164328A; Fri, 11 Aug 2023 10:58:51 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id D1F9D4325C for ; Fri, 11 Aug 2023 10:58:50 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 37AN2MC1011226 for ; Fri, 11 Aug 2023 01:58:50 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=DNrECj/SiGSUbc3vPoJxTXZ7X/J7ujhFR6Mnh4bBpjw=; b=cxmCG1qSr+YK8zp1/fc9ZVFmZGAIkHGOzEs4ev9tcvVcO1wJA5gn6re0G12W1WHeKN0q 4cmFhgINyVJ1LwsDWBLLOc4yDNVtTCGN02voC+Gohv5Pp1IMW0G2+Hwd+P16TXfIC15G Erby/+b/T8HWpBrpVasjq83uQ6BVQ8EPNbfKh3wzAmNlQo5B1djKstGjipvBn3ABcRiO JsMcSQXMWUDucuzV/sEHI2HZi5HsoAbU4MIfjrgwHZ/GDb8SVrQneuueYATJjt2Tn2y2 GC0nb85iAuMRjdHIhO1hRBStWxch7LfW0EuE7sHdGBQ4IVukzhVapX17zmzlJ9xUoQ29 7A== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3sd8ya1g9m-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 11 Aug 2023 01:58:50 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Fri, 11 Aug 2023 01:58:48 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Fri, 11 Aug 2023 01:58:48 -0700 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id A75CB3F706B; Fri, 11 Aug 2023 01:58:45 -0700 (PDT) From: Nithin Dabilpuram To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , , Srujana Challa Subject: [PATCH 13/31] common/cnxk: sync MAC addr set mailbox structure Date: Fri, 11 Aug 2023 14:27:47 +0530 Message-ID: <20230811085805.441256-13-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230811085805.441256-1-ndabilpuram@marvell.com> References: <20230811085805.441256-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: FATWfWEEwCMwFpyZvq4W3C1kAyVOVIdE X-Proofpoint-GUID: FATWfWEEwCMwFpyZvq4W3C1kAyVOVIdE X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-08-10_20,2023-08-10_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Srujana Challa Sync MAC address set mailbox format with kernel. And send match table index to the kernel to add the mac address. This fixes the issues on cn10kb, where traffic was not received when promisc is disabled and two ports are used. Signed-off-by: Srujana Challa --- drivers/common/cnxk/roc_mbox.h | 1 + drivers/common/cnxk/roc_nix.c | 1 + drivers/common/cnxk/roc_nix_mac.c | 8 ++++++-- drivers/common/cnxk/roc_nix_priv.h | 1 + 4 files changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h index 169bbcb664..04fc56465e 100644 --- a/drivers/common/cnxk/roc_mbox.h +++ b/drivers/common/cnxk/roc_mbox.h @@ -584,6 +584,7 @@ struct cgx_fec_stats_rsp { struct cgx_mac_addr_set_or_get { struct mbox_msghdr hdr; uint8_t __io mac_addr[PLT_ETHER_ADDR_LEN]; + uint32_t index; }; /* Structure for requesting the operation to diff --git a/drivers/common/cnxk/roc_nix.c b/drivers/common/cnxk/roc_nix.c index 152ef7269e..498328d6ed 100644 --- a/drivers/common/cnxk/roc_nix.c +++ b/drivers/common/cnxk/roc_nix.c @@ -475,6 +475,7 @@ roc_nix_dev_init(struct roc_nix *roc_nix) nix->pci_dev = pci_dev; nix->reta_sz = reta_sz; nix->mtu = ROC_NIX_DEFAULT_HW_FRS; + nix->dmac_flt_idx = -1; /* Register error and ras interrupts */ rc = nix_register_irqs(nix); diff --git a/drivers/common/cnxk/roc_nix_mac.c b/drivers/common/cnxk/roc_nix_mac.c index ac30fb52d1..e2e87be525 100644 --- a/drivers/common/cnxk/roc_nix_mac.c +++ b/drivers/common/cnxk/roc_nix_mac.c @@ -81,9 +81,9 @@ int roc_nix_mac_addr_set(struct roc_nix *roc_nix, const uint8_t addr[]) { struct nix *nix = roc_nix_to_nix_priv(roc_nix); + struct cgx_mac_addr_set_or_get *req, *rsp; struct dev *dev = &nix->dev; struct mbox *mbox = mbox_get(dev->mbox); - struct cgx_mac_addr_set_or_get *req; int rc; if (roc_nix_is_vf_or_sdp(roc_nix)) { @@ -97,9 +97,13 @@ roc_nix_mac_addr_set(struct roc_nix *roc_nix, const uint8_t addr[]) } req = mbox_alloc_msg_cgx_mac_addr_set(mbox); + req->index = nix->dmac_flt_idx; mbox_memcpy(req->mac_addr, addr, PLT_ETHER_ADDR_LEN); - rc = mbox_process(mbox); + rc = mbox_process_msg(mbox, (void *)&rsp); + if (rc) + goto exit; + nix->dmac_flt_idx = rsp->index; exit: mbox_put(mbox); return rc; diff --git a/drivers/common/cnxk/roc_nix_priv.h b/drivers/common/cnxk/roc_nix_priv.h index ea4211dfed..f82e411b70 100644 --- a/drivers/common/cnxk/roc_nix_priv.h +++ b/drivers/common/cnxk/roc_nix_priv.h @@ -153,6 +153,7 @@ struct nix { uint8_t sdp_links; uint8_t tx_link; uint16_t sqb_size; + uint32_t dmac_flt_idx; /* Without FCS, with L2 overhead */ uint16_t mtu; uint16_t chan_cnt;