From patchwork Fri Aug 11 08:57:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 130115 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4F7E243032; Fri, 11 Aug 2023 10:58:15 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 40DC0410E3; Fri, 11 Aug 2023 10:58:15 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 8BF7F410E3 for ; Fri, 11 Aug 2023 10:58:13 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 37AMjx5G001610 for ; Fri, 11 Aug 2023 01:58:12 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=pftw1U7JORUEQ3yIcXpg3sxn5xyZMTrRwABznshNmaE=; b=U8TuV+Kfm5QIeysikdh+Hi0YpTGrrBG44p6NHRfnGs/W3R8PWwHH0/oeXUWakWAZAbj6 OxfMJ/VzmvvmcuItPWFHVzJwlq6+QPjch0V7BWcbRjvEI2hJt+N6MD5b2ZeeZyO2H6oo /TD9BTQXk2qrdAgRF493SKNcNB9vrNehocqEl48IH04bx8JaQ5KKUeDiW6x0z3il+SMw 8VKqYqX3cIaMIufM0VM+SC6gqLfECq2MggDGLhpN1kZW88DS3lhybwrmci91p3jrqrWV q+r61YeGaUjkdgMtXCaMIZ/a05cL90NE2SWbEhnKDZeQ3AWB4/ZsmVZdGMzNyGTEwQsn 7w== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3sd8yp9r57-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 11 Aug 2023 01:58:12 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Fri, 11 Aug 2023 01:58:10 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Fri, 11 Aug 2023 01:58:10 -0700 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 7022B3F706D; Fri, 11 Aug 2023 01:58:08 -0700 (PDT) From: Nithin Dabilpuram To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , Subject: [PATCH 01/31] common/cnxk: add aura ref count mechanism Date: Fri, 11 Aug 2023 14:27:35 +0530 Message-ID: <20230811085805.441256-1-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: lp2PfJpHwDA8JMxZmh5N5O_5bidfKDRM X-Proofpoint-GUID: lp2PfJpHwDA8JMxZmh5N5O_5bidfKDRM X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-08-10_20,2023-08-10_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Sunil Kumar Kori Each RQ can be associated with lpb_aura and spb_aura. lpb_aura or spb_aura is shared across multiple RQs then cleanup via one RQ will reset the aura context. To prevent, adding ref count mechanism. Signed-off-by: Sunil Kumar Kori --- drivers/common/cnxk/roc_nix_fc.c | 6 ++++++ drivers/common/cnxk/roc_npa_priv.h | 1 + 2 files changed, 7 insertions(+) diff --git a/drivers/common/cnxk/roc_nix_fc.c b/drivers/common/cnxk/roc_nix_fc.c index d8ca5f9996..1f5ef960da 100644 --- a/drivers/common/cnxk/roc_nix_fc.c +++ b/drivers/common/cnxk/roc_nix_fc.c @@ -537,6 +537,7 @@ roc_nix_fc_npa_bp_cfg(struct roc_nix *roc_nix, uint64_t pool_id, uint8_t ena, ui plt_err("Enabling backpressue failed on aura 0x%" PRIx64, pool_id); } else { + lf->aura_attr[aura_id].ref_count++; plt_info("Ignoring port=%u tc=%u config on shared aura 0x%" PRIx64, roc_nix->port_id, tc, pool_id); } @@ -552,6 +553,8 @@ roc_nix_fc_npa_bp_cfg(struct roc_nix *roc_nix, uint64_t pool_id, uint8_t ena, ui if (ena) { if (roc_npa_aura_bp_configure(pool_id, nix->bpid[tc], bp_intf, bp_thresh, true)) plt_err("Enabling backpressue failed on aura 0x%" PRIx64, pool_id); + else + lf->aura_attr[aura_id].ref_count++; } else { bool found = !!force; @@ -561,6 +564,9 @@ roc_nix_fc_npa_bp_cfg(struct roc_nix *roc_nix, uint64_t pool_id, uint8_t ena, ui found = true; if (!found) return; + else if ((lf->aura_attr[aura_id].ref_count > 0) && + --lf->aura_attr[aura_id].ref_count) + return; if (roc_npa_aura_bp_configure(pool_id, 0, 0, 0, false)) plt_err("Disabling backpressue failed on aura 0x%" PRIx64, pool_id); diff --git a/drivers/common/cnxk/roc_npa_priv.h b/drivers/common/cnxk/roc_npa_priv.h index d2118cc4fb..704d93d5dc 100644 --- a/drivers/common/cnxk/roc_npa_priv.h +++ b/drivers/common/cnxk/roc_npa_priv.h @@ -49,6 +49,7 @@ struct npa_aura_lim { struct npa_aura_attr { int buf_type[ROC_NPA_BUF_TYPE_END]; + uint16_t ref_count; }; struct dev;