config/arm: add HiSilicon hip10

Message ID 20230626124304.27817-1-liudongdong3@huawei.com (mailing list archive)
State Accepted, archived
Delegated to: Thomas Monjalon
Headers
Series config/arm: add HiSilicon hip10 |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/loongarch-compilation success Compilation OK
ci/github-robot: build success github build: passed
ci/loongarch-unit-testing success Unit Testing PASS
ci/intel-Functional success Functional PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-aarch-unit-testing success Testing PASS
ci/iol-abi-testing success Testing PASS
ci/iol-unit-testing success Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS
ci/iol-testing success Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/intel-Testing success Testing PASS

Commit Message

Dongdong Liu June 26, 2023, 12:43 p.m. UTC
Adding support for HiSilicon hip10 platform.

Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
---
 config/arm/arm64_hip10_linux_gcc | 16 ++++++++++++++++
 config/arm/meson.build           | 19 +++++++++++++++++++
 2 files changed, 35 insertions(+)
 create mode 100644 config/arm/arm64_hip10_linux_gcc
  

Comments

Ruifeng Wang June 27, 2023, 3:13 a.m. UTC | #1
> -----Original Message-----
> From: Dongdong Liu <liudongdong3@huawei.com>
> Sent: Monday, June 26, 2023 8:43 PM
> To: dev@dpdk.org; ferruh.yigit@amd.com; thomas@monjalon.net; Ruifeng Wang
> <Ruifeng.Wang@arm.com>
> Subject: [PATCH] config/arm: add HiSilicon hip10
> 
> Adding support for HiSilicon hip10 platform.
> 
> Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
> ---
>  config/arm/arm64_hip10_linux_gcc | 16 ++++++++++++++++
>  config/arm/meson.build           | 19 +++++++++++++++++++
>  2 files changed, 35 insertions(+)
>  create mode 100644 config/arm/arm64_hip10_linux_gcc
> 
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
  
Thomas Monjalon June 27, 2023, 9:50 p.m. UTC | #2
27/06/2023 05:13, Ruifeng Wang:
> > -----Original Message-----
> > From: Dongdong Liu <liudongdong3@huawei.com>
> > Sent: Monday, June 26, 2023 8:43 PM
> > To: dev@dpdk.org; ferruh.yigit@amd.com; thomas@monjalon.net; Ruifeng Wang
> > <Ruifeng.Wang@arm.com>
> > Subject: [PATCH] config/arm: add HiSilicon hip10
> > 
> > Adding support for HiSilicon hip10 platform.
> > 
> > Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
> > ---
> >  config/arm/arm64_hip10_linux_gcc | 16 ++++++++++++++++
> >  config/arm/meson.build           | 19 +++++++++++++++++++
> >  2 files changed, 35 insertions(+)
> >  create mode 100644 config/arm/arm64_hip10_linux_gcc
> > 
> Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>

Applied, thanks.
  

Patch

diff --git a/config/arm/arm64_hip10_linux_gcc b/config/arm/arm64_hip10_linux_gcc
new file mode 100644
index 0000000000..2943e4abbf
--- /dev/null
+++ b/config/arm/arm64_hip10_linux_gcc
@@ -0,0 +1,16 @@ 
+[binaries]
+c = ['ccache', 'aarch64-linux-gnu-gcc']
+cpp = ['ccache', 'aarch64-linux-gnu-g++']
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+platform = 'hip10'
diff --git a/config/arm/meson.build b/config/arm/meson.build
index 535c8b4946..58e84abf2e 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -206,6 +206,16 @@  implementer_hisilicon = {
                 ['RTE_MAX_LCORE', 1280],
                 ['RTE_MAX_NUMA_NODES', 16]
             ]
+        },
+        '0xd03': {
+            'march': 'armv8.5-a',
+            'march_features': ['crypto', 'sve'],
+            'flags': [
+                ['RTE_MACHINE', '"hip10"'],
+                ['RTE_ARM_FEATURE_ATOMICS', true],
+                ['RTE_MAX_LCORE', 1280],
+                ['RTE_MAX_NUMA_NODES', 16]
+            ]
         }
     }
 }
@@ -389,6 +399,13 @@  soc_kunpeng930 = {
     'numa': true
 }
 
+soc_hip10 = {
+    'description': 'HiSilicon HIP10',
+    'implementer': '0x48',
+    'part_number': '0xd03',
+    'numa': true
+}
+
 soc_n1sdp = {
     'description': 'Arm Neoverse N1SDP',
     'implementer': '0x41',
@@ -472,6 +489,7 @@  ft2000plus:      Phytium FT-2000+
 tys2500:         Phytium TengYun S2500
 graviton2:       AWS Graviton2
 graviton3:       AWS Graviton3
+hip10:           HiSilicon HIP10
 kunpeng920:      HiSilicon Kunpeng 920
 kunpeng930:      HiSilicon Kunpeng 930
 n1sdp:           Arm Neoverse N1SDP
@@ -499,6 +517,7 @@  socs = {
     'tys2500': soc_tys2500,
     'graviton2': soc_graviton2,
     'graviton3': soc_graviton3,
+    'hip10': soc_hip10,
     'kunpeng920': soc_kunpeng920,
     'kunpeng930': soc_kunpeng930,
     'n1sdp': soc_n1sdp,