From patchwork Mon Jun 12 16:06:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerin Jacob Kollanukkaran X-Patchwork-Id: 128509 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id DDDFE42C50; Mon, 12 Jun 2023 18:06:41 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 6FACD41138; Mon, 12 Jun 2023 18:06:41 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 643A840698 for ; Mon, 12 Jun 2023 18:06:39 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 35CEGhQ8029479 for ; Mon, 12 Jun 2023 09:06:38 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=811DZ5NO0wN4JE55YlrLZEIJA+sYPpctMIbgMaiuydA=; b=dqKxkbKuGSomu2wmjk14PuLenLfdY0/VVnzFYnk9C4m9JHh+bA+5oeEYSoQN0WEC6jCr RZXO3g5sMejiuPWpAbltPqeWRc9Otep01KNPqHkXlZVkHaFjpg+ksFAJrbizNgJOyXxT 3RSO1U7pN0e2kluAsqDEQVLdLHdq99KdF4t/W6pSCQOhon6btarPYzCbTARLIcB+N5T2 fRSRJ88V/F7cUSPHaZb5jhwkIETj9ag5XgjmQfQ/HNnhyCzEjK2ysu03ddG4sQS/n9iH AkgSuw7M3LGCV9G8maDvvu1FynKU5qVwXmBqvSWxhQk68fYNCVTLqSslDjsZ8uFB/vHA Hw== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3r65020f8k-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 12 Jun 2023 09:06:38 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Mon, 12 Jun 2023 09:06:36 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Mon, 12 Jun 2023 09:06:36 -0700 Received: from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14]) by maili.marvell.com (Postfix) with ESMTP id EAA335B6942; Mon, 12 Jun 2023 09:06:33 -0700 (PDT) From: To: , Pavan Nikhilesh , "Shijith Thotton" , Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: Jerin Jacob Subject: [dpdk-dev] [PATCH v2] drivers/cnxk: improve the build time for non arm64 build Date: Mon, 12 Jun 2023 21:36:27 +0530 Message-ID: <20230612160627.1044076-1-jerinj@marvell.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230529092312.3855432-1-jerinj@marvell.com> References: <20230529092312.3855432-1-jerinj@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: 2dcAZUEV-U9ZKxUyVnQpQpHgX3O-WZCr X-Proofpoint-GUID: 2dcAZUEV-U9ZKxUyVnQpQpHgX3O-WZCr X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-06-12_06,2023-06-09_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Jerin Jacob Specialized fast path routines are not applicable to non arm64 build, removing those function contained files to improve the build time on non arm64 build. Signed-off-by: Jerin Jacob Acked-by: Nithin Dabilpuram --- v2: - Just resending to go through CI again. drivers/event/cnxk/cn10k_eventdev.c | 5 +++++ drivers/event/cnxk/cn9k_eventdev.c | 4 ++++ drivers/event/cnxk/meson.build | 10 ++++++++++ drivers/net/cnxk/cn10k_rx_select.c | 6 +++++- drivers/net/cnxk/cn10k_tx_select.c | 6 +++++- drivers/net/cnxk/cn9k_rx_select.c | 6 +++++- drivers/net/cnxk/cn9k_tx_select.c | 6 +++++- drivers/net/cnxk/meson.build | 4 ++++ 8 files changed, 43 insertions(+), 4 deletions(-) diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c index 670fc9e926..468549749f 100644 --- a/drivers/event/cnxk/cn10k_eventdev.c +++ b/drivers/event/cnxk/cn10k_eventdev.c @@ -297,7 +297,9 @@ cn10k_sso_updt_tx_adptr_data(const struct rte_eventdev *event_dev) static void cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev) { +#if defined(RTE_ARCH_ARM64) struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev); + struct roc_cpt *cpt = roc_idev_cpt_get(); const event_dequeue_t sso_hws_deq[NIX_RX_OFFLOAD_MAX] = { #define R(name, flags)[flags] = cn10k_sso_hws_deq_##name, @@ -473,6 +475,9 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev) CN10K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue, sso_hws_tx_adptr_enq); event_dev->txa_enqueue_same_dest = event_dev->txa_enqueue; +#else + RTE_SET_USED(event_dev); +#endif } static void diff --git a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k_eventdev.c index 7ed9aa1331..8e7af6ebd7 100644 --- a/drivers/event/cnxk/cn9k_eventdev.c +++ b/drivers/event/cnxk/cn9k_eventdev.c @@ -309,6 +309,7 @@ cn9k_sso_updt_tx_adptr_data(const struct rte_eventdev *event_dev) static void cn9k_sso_fp_fns_set(struct rte_eventdev *event_dev) { +#if defined(RTE_ARCH_ARM64) struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev); /* Single WS modes */ const event_dequeue_t sso_hws_deq[NIX_RX_OFFLOAD_MAX] = { @@ -511,6 +512,9 @@ cn9k_sso_fp_fns_set(struct rte_eventdev *event_dev) event_dev->txa_enqueue_same_dest = event_dev->txa_enqueue; rte_mb(); +#else + RTE_SET_USED(event_dev); +#endif } static void * diff --git a/drivers/event/cnxk/meson.build b/drivers/event/cnxk/meson.build index e38d3b0244..63b926d34f 100644 --- a/drivers/event/cnxk/meson.build +++ b/drivers/event/cnxk/meson.build @@ -31,6 +31,10 @@ if soc_type == 'cn9k' or soc_type == 'all' sources += files( 'cn9k_eventdev.c', 'cn9k_worker.c', +) + +if host_machine.cpu_family().startswith('aarch') +sources += files( 'deq/cn9k/deq_0_15_burst.c', 'deq/cn9k/deq_16_31_burst.c', 'deq/cn9k/deq_32_47_burst.c', @@ -202,11 +206,16 @@ sources += files( 'tx/cn9k/tx_112_127_dual_seg.c', ) endif +endif if soc_type == 'cn10k' or soc_type == 'all' sources += files( 'cn10k_eventdev.c', 'cn10k_worker.c', +) + +if host_machine.cpu_family().startswith('aarch') +sources += files( 'deq/cn10k/deq_0_15_burst.c', 'deq/cn10k/deq_16_31_burst.c', 'deq/cn10k/deq_32_47_burst.c', @@ -292,6 +301,7 @@ sources += files( 'tx/cn10k/tx_112_127_seg.c', ) endif +endif extra_flags = ['-flax-vector-conversions', '-Wno-strict-aliasing'] foreach flag: extra_flags diff --git a/drivers/net/cnxk/cn10k_rx_select.c b/drivers/net/cnxk/cn10k_rx_select.c index 1e0de1b7ac..1d44f2924e 100644 --- a/drivers/net/cnxk/cn10k_rx_select.c +++ b/drivers/net/cnxk/cn10k_rx_select.c @@ -5,7 +5,7 @@ #include "cn10k_ethdev.h" #include "cn10k_rx.h" -static inline void +static __rte_used void pick_rx_func(struct rte_eth_dev *eth_dev, const eth_rx_burst_t rx_burst[NIX_RX_OFFLOAD_MAX]) { @@ -25,6 +25,7 @@ pick_rx_func(struct rte_eth_dev *eth_dev, void cn10k_eth_set_rx_function(struct rte_eth_dev *eth_dev) { +#if defined(RTE_ARCH_ARM64) struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev); const eth_rx_burst_t nix_eth_rx_burst[NIX_RX_OFFLOAD_MAX] = { @@ -111,4 +112,7 @@ cn10k_eth_set_rx_function(struct rte_eth_dev *eth_dev) return pick_rx_func(eth_dev, nix_eth_rx_vec_burst_reas); else return pick_rx_func(eth_dev, nix_eth_rx_vec_burst); +#else + RTE_SET_USED(eth_dev); +#endif } diff --git a/drivers/net/cnxk/cn10k_tx_select.c b/drivers/net/cnxk/cn10k_tx_select.c index 54023c4234..404f5ba979 100644 --- a/drivers/net/cnxk/cn10k_tx_select.c +++ b/drivers/net/cnxk/cn10k_tx_select.c @@ -5,7 +5,7 @@ #include "cn10k_ethdev.h" #include "cn10k_tx.h" -static inline void +static __rte_used inline void pick_tx_func(struct rte_eth_dev *eth_dev, const eth_tx_burst_t tx_burst[NIX_TX_OFFLOAD_MAX]) { @@ -23,6 +23,7 @@ pick_tx_func(struct rte_eth_dev *eth_dev, void cn10k_eth_set_tx_function(struct rte_eth_dev *eth_dev) { +#if defined(RTE_ARCH_ARM64) struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev); const eth_tx_burst_t nix_eth_tx_burst[NIX_TX_OFFLOAD_MAX] = { @@ -64,4 +65,7 @@ cn10k_eth_set_tx_function(struct rte_eth_dev *eth_dev) } rte_mb(); +#else + RTE_SET_USED(eth_dev); +#endif } diff --git a/drivers/net/cnxk/cn9k_rx_select.c b/drivers/net/cnxk/cn9k_rx_select.c index 79f171fcc3..05bc33ce6a 100644 --- a/drivers/net/cnxk/cn9k_rx_select.c +++ b/drivers/net/cnxk/cn9k_rx_select.c @@ -5,7 +5,7 @@ #include "cn9k_ethdev.h" #include "cn9k_rx.h" -static inline void +static __rte_used void pick_rx_func(struct rte_eth_dev *eth_dev, const eth_rx_burst_t rx_burst[NIX_RX_OFFLOAD_MAX]) { @@ -25,6 +25,7 @@ pick_rx_func(struct rte_eth_dev *eth_dev, void cn9k_eth_set_rx_function(struct rte_eth_dev *eth_dev) { +#if defined(RTE_ARCH_ARM64) struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev); const eth_rx_burst_t nix_eth_rx_burst[NIX_RX_OFFLOAD_MAX] = { @@ -68,4 +69,7 @@ cn9k_eth_set_rx_function(struct rte_eth_dev *eth_dev) if (dev->rx_offloads & RTE_ETH_RX_OFFLOAD_SCATTER) return pick_rx_func(eth_dev, nix_eth_rx_vec_burst_mseg); return pick_rx_func(eth_dev, nix_eth_rx_vec_burst); +#else + RTE_SET_USED(eth_dev); +#endif } diff --git a/drivers/net/cnxk/cn9k_tx_select.c b/drivers/net/cnxk/cn9k_tx_select.c index 62beb1bf38..e08883f032 100644 --- a/drivers/net/cnxk/cn9k_tx_select.c +++ b/drivers/net/cnxk/cn9k_tx_select.c @@ -5,7 +5,7 @@ #include "cn9k_ethdev.h" #include "cn9k_tx.h" -static inline void +static __rte_used void pick_tx_func(struct rte_eth_dev *eth_dev, const eth_tx_burst_t tx_burst[NIX_TX_OFFLOAD_MAX]) { @@ -23,6 +23,7 @@ pick_tx_func(struct rte_eth_dev *eth_dev, void cn9k_eth_set_tx_function(struct rte_eth_dev *eth_dev) { +#if defined(RTE_ARCH_ARM64) struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev); const eth_tx_burst_t nix_eth_tx_burst[NIX_TX_OFFLOAD_MAX] = { @@ -60,4 +61,7 @@ cn9k_eth_set_tx_function(struct rte_eth_dev *eth_dev) } rte_mb(); +#else + RTE_SET_USED(eth_dev); +#endif } diff --git a/drivers/net/cnxk/meson.build b/drivers/net/cnxk/meson.build index 62b8bb90fb..394d3d01f4 100644 --- a/drivers/net/cnxk/meson.build +++ b/drivers/net/cnxk/meson.build @@ -45,6 +45,7 @@ sources += files( 'cn9k_tx_select.c', ) +if host_machine.cpu_family().startswith('aarch') sources += files( 'rx/cn9k/rx_0_15.c', 'rx/cn9k/rx_16_31.c', @@ -115,6 +116,7 @@ sources += files( 'tx/cn9k/tx_112_127_vec_mseg.c', ) endif +endif if soc_type == 'cn10k' or soc_type == 'all' # CN10K @@ -126,6 +128,7 @@ sources += files( 'cn10k_tx_select.c', ) +if host_machine.cpu_family().startswith('aarch') sources += files( 'rx/cn10k/rx_0_15.c', 'rx/cn10k/rx_16_31.c', @@ -196,6 +199,7 @@ sources += files( 'tx/cn10k/tx_112_127_vec_mseg.c', ) endif +endif deps += ['bus_pci', 'cryptodev', 'eventdev', 'security'] deps += ['common_cnxk', 'mempool_cnxk']