From patchwork Thu May 18 15:16:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qiming Yang X-Patchwork-Id: 127000 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4F4E842AF1; Thu, 18 May 2023 17:35:10 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B570842D4B; Thu, 18 May 2023 17:34:31 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mails.dpdk.org (Postfix) with ESMTP id 9220F42D44 for ; Thu, 18 May 2023 17:34:30 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1684424070; x=1715960070; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hN6Fu8K+AMWDvv/cKpPmtPBcgZ6U0WjcmXofsz80eY4=; b=dXQed6zxbztG+cFZY9lYcsDPKgcPWIyRBg5nwbaioH8AEXV2ic7DZiPo 4QQod3ZJFkgkkvZQzzS2Bahvcp+kXLZn+Yp8Nnd0TXJhLIMlEN8Ij4YmN JD8dR9G1nXWtg5FbjXpWDITdul1Z0jKJSPYjSoRne9l+Eos9WbZzqcWyt UZlGNy9WPmZViI+8KwceKHz8HgzGfmWvMH4vj41XhgoohLcoUti1aiCfs IYSKc91M9gq/Ccc1oD273EZQ3ze2A4cBPeZO5kA+XGppM4qO39ss5x/75 UTJHalwkE5tsaTyhxDeQOzGxXqcKO8DNbZ4xHXVQcYeMehWmzygB1O3dy A==; X-IronPort-AV: E=McAfee;i="6600,9927,10714"; a="341527662" X-IronPort-AV: E=Sophos;i="5.99,285,1677571200"; d="scan'208";a="341527662" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 May 2023 08:34:30 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10714"; a="705235082" X-IronPort-AV: E=Sophos;i="5.99,285,1677571200"; d="scan'208";a="705235082" Received: from dpdk-qiming3.sh.intel.com ([10.67.111.4]) by fmsmga007.fm.intel.com with ESMTP; 18 May 2023 08:34:27 -0700 From: Qiming Yang To: dev@dpdk.org Cc: qi.z.zhang@intel.com, Qiming Yang , Eric Joyner Subject: [PATCH v2 06/20] net/ice/base: add missing AQ flag to AQ command Date: Thu, 18 May 2023 15:16:24 +0000 Message-Id: <20230518151638.1207021-7-qiming.yang@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230518151638.1207021-1-qiming.yang@intel.com> References: <20230427062001.478032-1-qiming.yang@intel.com> <20230518151638.1207021-1-qiming.yang@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The RD flag needs to be set when virtual port rules are added since the FW needs to read the additional buffer with the mirror rule parameters. Signed-off-by: Eric Joyner Signed-off-by: Qiming Yang --- drivers/net/ice/base/ice_switch.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index c71861a36d..f201c287fc 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -3134,6 +3134,8 @@ ice_aq_add_update_mir_rule(struct ice_hw *hw, u16 rule_type, u16 dest_vsi, else /* remove VSI from mirror rule */ mr_list[i] = CPU_TO_LE16(id); } + + desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD); } cmd = &desc.params.add_update_rule;