From patchwork Thu May 18 15:16:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qiming Yang X-Patchwork-Id: 127008 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5EF5642AF1; Thu, 18 May 2023 17:36:12 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9DAD542D9C; Thu, 18 May 2023 17:34:44 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mails.dpdk.org (Postfix) with ESMTP id B62F042D46 for ; Thu, 18 May 2023 17:34:41 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1684424081; x=1715960081; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=mzQOERMGypxJoQsco10SV5AiB+4C53hjbLbQKM9A/Kc=; b=KjxP9sNxuLyf1ZtP3fOZGUUmJRdx9ZSiP8LPDitSPEU+KOhTLbKTM/72 avTNLUbepUayT1cAd0wz1v2A3vpIq/R3ns3/k7KcHJUHLNQToBbCazRlB qnmMroS8by/JeQlabmlyOGDX2LlDuL54Y0BVZbAZv/fPrnrIeIwoW/EEC 5RnOug/y2S6aod5FL+FdrSjENUmlyvO9hZhSaADPy5QcVYAsUZUJTJwS9 wbD7Cbfc6OVtWGMP5Qpy5eIPUOIQHhS0vJA8H1QRQCE4JILOhF1ZYAByW itqt7QCkB2qlBJb3UHs2BgeCWxglJT/gljN8KjGtSqZBnFahCLppsmA/O Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10714"; a="341527743" X-IronPort-AV: E=Sophos;i="5.99,285,1677571200"; d="scan'208";a="341527743" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 May 2023 08:34:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10714"; a="705235178" X-IronPort-AV: E=Sophos;i="5.99,285,1677571200"; d="scan'208";a="705235178" Received: from dpdk-qiming3.sh.intel.com ([10.67.111.4]) by fmsmga007.fm.intel.com with ESMTP; 18 May 2023 08:34:40 -0700 From: Qiming Yang To: dev@dpdk.org Cc: qi.z.zhang@intel.com, Qiming Yang , Marcin Domagala Subject: [PATCH v2 14/20] net/ice/base: modify tunnel match mask Date: Thu, 18 May 2023 15:16:32 +0000 Message-Id: <20230518151638.1207021-15-qiming.yang@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230518151638.1207021-1-qiming.yang@intel.com> References: <20230427062001.478032-1-qiming.yang@intel.com> <20230518151638.1207021-1-qiming.yang@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Tunneled packets with VLAN inside were not detected by filter. This patch fix it by modifying tunnel flag match mask. As a result both type of packets (tunneled VLAN, tunneled non-VLAN) will be detected by filter. Signed-off-by: Marcin Domagala Signed-off-by: Qiming Yang --- drivers/net/ice/base/ice_common.c | 4 +++- drivers/net/ice/base/ice_protocol_type.h | 1 + drivers/net/ice/base/ice_switch.c | 3 ++- 3 files changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index 9992d0ad4d..67203cb932 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -1510,7 +1510,9 @@ enum ice_status ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index) return ICE_SUCCESS; } -/* LAN Tx Queue Context */ +/* LAN Tx Queue Context used for set Tx config by ice_aqc_opc_add_txqs, + * Bit[0-175] is valid + */ const struct ice_ctx_ele ice_tlan_ctx_info[] = { /* Field Width LSB */ ICE_CTX_STORE(ice_tlan_ctx, base, 57, 0), diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h index 05a89050fe..d2d3f75fc2 100644 --- a/drivers/net/ice/base/ice_protocol_type.h +++ b/drivers/net/ice/base/ice_protocol_type.h @@ -226,6 +226,7 @@ enum ice_prot_id { #define ICE_TUN_FLAG_MDID_OFF(word) (ICE_MDID_SIZE * (ICE_TUN_FLAG_MDID + (word))) #define ICE_TUN_FLAG_MASK 0xFF #define ICE_DIR_FLAG_MASK 0x10 +#define ICE_TUN_FLAG_IN_VLAN_MASK 0x80 /* VLAN inside tunneled header */ #define ICE_TUN_FLAG_VLAN_MASK 0x01 #define ICE_TUN_FLAG_FV_IND 2 diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index c86d68d543..06665a29db 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -7790,7 +7790,8 @@ ice_tun_type_match_word(struct ice_adv_rule_info *rinfo, u16 *off, u16 *mask) case ICE_SW_TUN_GENEVE_VLAN: case ICE_SW_TUN_VXLAN_VLAN: - *mask = ICE_TUN_FLAG_MASK & ~ICE_TUN_FLAG_VLAN_MASK; + *mask = ICE_TUN_FLAG_MASK & ~(ICE_TUN_FLAG_VLAN_MASK | + ICE_TUN_FLAG_IN_VLAN_MASK); *off = ICE_TUN_FLAG_MDID_OFF(1); return true;