From patchwork Thu Mar 2 21:20:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Liu, Mingxia" X-Patchwork-Id: 124700 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 78BEF41DB5; Thu, 2 Mar 2023 14:07:18 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5B99742D44; Thu, 2 Mar 2023 14:06:23 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mails.dpdk.org (Postfix) with ESMTP id E086742D17 for ; Thu, 2 Mar 2023 14:06:20 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1677762381; x=1709298381; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nnGMTSX12JzKyrsKJQENnN8WcYAnppFHZ/FS/WKUL3A=; b=XjHkslO8KDgEGPWAC+rSQ5qnl3/KEGWOGouZLMD2+T+S2oaZrgNPx1pA CETbQH6iFR6I26lAGZPdlvtqYF/Bui1q6yieJ6e7WHWoLlRBoLYdAMrP4 G2zTeveTyKoJe+48/8TWLudEr+yB6L5yQyhxEVJKamGQ+y2wOhuVzFiRW +boeXKzI60NMzdkn/WIWX20tm5RyJeTiEzXVrZqTe8+57ASDbWzPFrkWy 93BFgI6ZpdtqKCr+7JqAu7S2wHgJjjGbT+byfVhs1qB+BynSYD5DqnsyQ TVKz8DuaSEXLbD02DMnztxXjUNs8l/UZGFjf1pUe0UjlBCONiJWnG0QzB g==; X-IronPort-AV: E=McAfee;i="6500,9779,10636"; a="322988217" X-IronPort-AV: E=Sophos;i="5.98,227,1673942400"; d="scan'208";a="322988217" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Mar 2023 05:06:20 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10636"; a="707406410" X-IronPort-AV: E=Sophos;i="5.98,227,1673942400"; d="scan'208";a="707406410" Received: from dpdk-mingxial-ice.sh.intel.com ([10.67.110.191]) by orsmga001.jf.intel.com with ESMTP; 02 Mar 2023 05:06:19 -0800 From: Mingxia Liu To: dev@dpdk.org, beilei.xing@intel.com, yuying.zhang@intel.com Cc: Mingxia Liu Subject: [PATCH v9 10/21] net/cpfl: support basic Tx data path Date: Thu, 2 Mar 2023 21:20:46 +0000 Message-Id: <20230302212057.1114863-11-mingxia.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230302212057.1114863-1-mingxia.liu@intel.com> References: <20230302103527.931071-1-mingxia.liu@intel.com> <20230302212057.1114863-1-mingxia.liu@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add basic Tx support in split queue mode and single queue mode. Signed-off-by: Mingxia Liu --- drivers/net/cpfl/cpfl_ethdev.c | 3 +++ drivers/net/cpfl/cpfl_rxtx.c | 20 ++++++++++++++++++++ drivers/net/cpfl/cpfl_rxtx.h | 1 + 3 files changed, 24 insertions(+) diff --git a/drivers/net/cpfl/cpfl_ethdev.c b/drivers/net/cpfl/cpfl_ethdev.c index 767612b11c..c3a6104dac 100644 --- a/drivers/net/cpfl/cpfl_ethdev.c +++ b/drivers/net/cpfl/cpfl_ethdev.c @@ -94,6 +94,8 @@ cpfl_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) dev_info->max_mtu = vport->max_mtu; dev_info->min_mtu = RTE_ETHER_MIN_MTU; + dev_info->tx_offload_capa = RTE_ETH_TX_OFFLOAD_MULTI_SEGS; + dev_info->default_txconf = (struct rte_eth_txconf) { .tx_free_thresh = CPFL_DEFAULT_TX_FREE_THRESH, .tx_rs_thresh = CPFL_DEFAULT_TX_RS_THRESH, @@ -253,6 +255,7 @@ cpfl_dev_start(struct rte_eth_dev *dev) } cpfl_set_rx_function(dev); + cpfl_set_tx_function(dev); ret = idpf_vc_vport_ena_dis(vport, true); if (ret != 0) { diff --git a/drivers/net/cpfl/cpfl_rxtx.c b/drivers/net/cpfl/cpfl_rxtx.c index a0a442f61d..520f61e07e 100644 --- a/drivers/net/cpfl/cpfl_rxtx.c +++ b/drivers/net/cpfl/cpfl_rxtx.c @@ -752,3 +752,23 @@ cpfl_set_rx_function(struct rte_eth_dev *dev) dev->rx_pkt_burst = idpf_dp_singleq_recv_pkts; } } + +void +cpfl_set_tx_function(struct rte_eth_dev *dev) +{ + struct idpf_vport *vport = dev->data->dev_private; + + if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT) { + PMD_DRV_LOG(NOTICE, + "Using Split Scalar Tx (port %d).", + dev->data->port_id); + dev->tx_pkt_burst = idpf_dp_splitq_xmit_pkts; + dev->tx_pkt_prepare = idpf_dp_prep_pkts; + } else { + PMD_DRV_LOG(NOTICE, + "Using Single Scalar Tx (port %d).", + dev->data->port_id); + dev->tx_pkt_burst = idpf_dp_singleq_xmit_pkts; + dev->tx_pkt_prepare = idpf_dp_prep_pkts; + } +} diff --git a/drivers/net/cpfl/cpfl_rxtx.h b/drivers/net/cpfl/cpfl_rxtx.h index a5dd388e1f..5f8144e55f 100644 --- a/drivers/net/cpfl/cpfl_rxtx.h +++ b/drivers/net/cpfl/cpfl_rxtx.h @@ -38,4 +38,5 @@ int cpfl_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id); void cpfl_dev_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid); void cpfl_dev_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid); void cpfl_set_rx_function(struct rte_eth_dev *dev); +void cpfl_set_tx_function(struct rte_eth_dev *dev); #endif /* _CPFL_RXTX_H_ */