diff mbox series

[1/2] net/nfp: update macro definitions in Tx flag

Message ID 20230203070555.36199-2-chaoyong.he@corigine.com (mailing list archive)
State Accepted, archived
Delegated to: Ferruh Yigit
Headers
Series add VXLAN inner TSO with noudpcsum support for NFP cards |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Chaoyong He Feb. 3, 2023, 7:05 a.m. UTC 
  From: Fei Qin <fei.qin@corigine.com>

In firmware, bit 0 and bit 1 in Tx descriptor flag are defined
as "PCIE_DESC_TX_ENCAP" and "PCIE_DESC_TX_O_IP4_CSUM". Meanwhile,
bit 0 is used to mark tunnel packets and bit 1 is used to set
outer ip cusm offload. Thus, update the macro definitions as
same as the ones in firmware.

Signed-off-by: Fei Qin <fei.qin@corigine.com>
Reviewed-by: Chaoyong He <chaoyong.he@corigine.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund@corigine.com>
---
 drivers/net/nfp/nfp_rxtx.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/nfp/nfp_rxtx.h b/drivers/net/nfp/nfp_rxtx.h
index 8a29adbd73..f9223b8912 100644
--- a/drivers/net/nfp/nfp_rxtx.h
+++ b/drivers/net/nfp/nfp_rxtx.h
@@ -108,8 +108,8 @@  struct nfp_meta_parsed {
 #define PCIE_DESC_TX_VLAN               (1 << 3)
 #define PCIE_DESC_TX_LSO                (1 << 2)
 #define PCIE_DESC_TX_ENCAP_NONE         (0)
-#define PCIE_DESC_TX_ENCAP_VXLAN        (1 << 1)
-#define PCIE_DESC_TX_ENCAP_GRE          (1 << 0)
+#define PCIE_DESC_TX_ENCAP              (1 << 1)
+#define PCIE_DESC_TX_O_IP4_CSUM         (1 << 0)
 
 #define NFDK_TX_MAX_DATA_PER_HEAD       0x00001000
 #define NFDK_DESC_TX_DMA_LEN_HEAD       0x0fff