From patchwork Wed Jan 18 07:31:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Liu, Mingxia" X-Patchwork-Id: 122261 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E9C534240B; Wed, 18 Jan 2023 09:28:38 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id CBE2042D72; Wed, 18 Jan 2023 09:27:56 +0100 (CET) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mails.dpdk.org (Postfix) with ESMTP id 8C58142D68 for ; Wed, 18 Jan 2023 09:27:55 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1674030475; x=1705566475; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Za0savtRrn/MzPK0uES8ThZOXuXeoqeVeL75ggWp7Qo=; b=G+/Ufhli2ZMQUkt0qe0t3+zTZHo7tZ0ZQk85XY4IyBFI4pefP+3NNeQh 3SQS2xLbJ0iTkhzgSzEKIK5Mm3Mer4b0p1uWIrDs9DOHdNkdzTFq29F8e CmD+1ElcK8hbX93NyGvGv85m5OFL0Wms1rmZFgyrrXTlhJpE6JDrF0wPM zPpgX2brxSOkclkTu0owvCzXdHGApPWeSwvEzACftn0BENDsl36s6oDRL Tt8ESWZYhYlcNbucTbl7JbFAQABYyJMSPiOZH4wr5HF2Ez4rRgoOUww6L 3Fq3QrU1+oQs/QN6Y2lZ4Mzr1x1xIJNjoLWIqxlHdNmTXIELqOR1dcJkg g==; X-IronPort-AV: E=McAfee;i="6500,9779,10593"; a="305304249" X-IronPort-AV: E=Sophos;i="5.97,224,1669104000"; d="scan'208";a="305304249" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Jan 2023 00:27:55 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10593"; a="652835274" X-IronPort-AV: E=Sophos;i="5.97,224,1669104000"; d="scan'208";a="652835274" Received: from dpdk-mingxial-01.sh.intel.com ([10.67.119.167]) by orsmga007.jf.intel.com with ESMTP; 18 Jan 2023 00:27:50 -0800 From: Mingxia Liu To: dev@dpdk.org, qi.z.zhang@intel.com, jingjing.wu@intel.com, beilei.xing@intel.com Cc: wenjun1.wu@intel.com, Mingxia Liu Subject: [PATCH v3 08/21] net/cpfl: support MTU configuration Date: Wed, 18 Jan 2023 07:31:44 +0000 Message-Id: <20230118073154.903012-9-mingxia.liu@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230118073154.903012-1-mingxia.liu@intel.com> References: <20230113081931.221576-1-mingxia.liu@intel.com> <20230118073154.903012-1-mingxia.liu@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add dev ops mtu_set. Signed-off-by: Mingxia Liu --- doc/guides/nics/features/cpfl.ini | 1 + drivers/net/cpfl/cpfl_ethdev.c | 27 +++++++++++++++++++++++++++ 2 files changed, 28 insertions(+) diff --git a/doc/guides/nics/features/cpfl.ini b/doc/guides/nics/features/cpfl.ini index a2d1ca9e15..470ba81579 100644 --- a/doc/guides/nics/features/cpfl.ini +++ b/doc/guides/nics/features/cpfl.ini @@ -7,6 +7,7 @@ ; is selected. ; [Features] +MTU update = Y Linux = Y x86-32 = Y x86-64 = Y diff --git a/drivers/net/cpfl/cpfl_ethdev.c b/drivers/net/cpfl/cpfl_ethdev.c index 33a0b9ba60..1f40f1749e 100644 --- a/drivers/net/cpfl/cpfl_ethdev.c +++ b/drivers/net/cpfl/cpfl_ethdev.c @@ -121,6 +121,27 @@ cpfl_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) return 0; } +static int +cpfl_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) +{ + struct idpf_vport *vport = dev->data->dev_private; + + /* mtu setting is forbidden if port is start */ + if (dev->data->dev_started) { + PMD_DRV_LOG(ERR, "port must be stopped before configuration"); + return -EBUSY; + } + + if (mtu > vport->max_mtu) { + PMD_DRV_LOG(ERR, "MTU should be less than %d", vport->max_mtu); + return -EINVAL; + } + + vport->max_pkt_len = mtu + CPFL_ETH_OVERHEAD; + + return 0; +} + static const uint32_t * cpfl_dev_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused) { @@ -142,6 +163,7 @@ cpfl_dev_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused) static int cpfl_dev_configure(struct rte_eth_dev *dev) { + struct idpf_vport *vport = dev->data->dev_private; struct rte_eth_conf *conf = &dev->data->dev_conf; if (conf->link_speeds & RTE_ETH_LINK_SPEED_FIXED) { @@ -181,6 +203,10 @@ cpfl_dev_configure(struct rte_eth_dev *dev) return -ENOTSUP; } + vport->max_pkt_len = + (dev->data->mtu == 0) ? CPFL_DEFAULT_MTU : dev->data->mtu + + CPFL_ETH_OVERHEAD; + return 0; } @@ -625,6 +651,7 @@ static const struct eth_dev_ops cpfl_eth_dev_ops = { .tx_queue_stop = cpfl_tx_queue_stop, .rx_queue_release = cpfl_dev_rx_queue_release, .tx_queue_release = cpfl_dev_tx_queue_release, + .mtu_set = cpfl_dev_mtu_set, .dev_supported_ptypes_get = cpfl_dev_supported_ptypes_get, };