net/mlx5: fix wait descriptor opcode for ConnectX-7
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Commit Message
Since ConnectX-7 the special hardware capability to schedule
packet sending on specified time is provided. It uses special
WAIT WQE (hardware descriptor) with wait condition defined
by opcode. The CYCLIC_BIGGER was wrongly used instead of
CYCLIC_SMALLER. This caused arbitrary and stale time shift
in traffic scheduling.
Fixes: 49e8797619e40 ("net/mlx5: support wait on time in Tx")
Cc: stable@dpdk.org
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
drivers/net/mlx5/mlx5_tx.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Comments
Hi,
> -----Original Message-----
> From: Slava Ovsiienko <viacheslavo@nvidia.com>
> Sent: Tuesday, January 3, 2023 1:11 PM
> To: dev@dpdk.org
> Cc: Matan Azrad <matan@nvidia.com>; Raslan Darawsheh
> <rasland@nvidia.com>; Ori Kam <orika@nvidia.com>; stable@dpdk.org
> Subject: [PATCH] net/mlx5: fix wait descriptor opcode for ConnectX-7
>
> Since ConnectX-7 the special hardware capability to schedule
> packet sending on specified time is provided. It uses special
> WAIT WQE (hardware descriptor) with wait condition defined
> by opcode. The CYCLIC_BIGGER was wrongly used instead of
> CYCLIC_SMALLER. This caused arbitrary and stale time shift
> in traffic scheduling.
>
> Fixes: 49e8797619e40 ("net/mlx5: support wait on time in Tx")
> Cc: stable@dpdk.org
>
> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Patch applied to next-net-mlx,
Kindest regards,
Raslan Darawsheh
@@ -817,7 +817,7 @@ mlx5_tx_wseg_init(struct mlx5_txq_data *restrict txq,
struct mlx5_wqe_wseg *ws;
ws = RTE_PTR_ADD(wqe, MLX5_WSEG_SIZE);
- ws->operation = rte_cpu_to_be_32(MLX5_WAIT_COND_CYCLIC_BIGGER);
+ ws->operation = rte_cpu_to_be_32(MLX5_WAIT_COND_CYCLIC_SMALLER);
ws->lkey = RTE_BE32(0);
ws->va_high = RTE_BE32(0);
ws->va_low = RTE_BE32(0);