From patchwork Thu Oct 27 10:50:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Dooley X-Patchwork-Id: 119234 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C66FFA00C5; Thu, 27 Oct 2022 12:50:22 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 648AC42B85; Thu, 27 Oct 2022 12:50:21 +0200 (CEST) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by mails.dpdk.org (Postfix) with ESMTP id E7EE640A7F; Thu, 27 Oct 2022 12:50:19 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1666867820; x=1698403820; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=F5RwR8mvGeWYlhIHQdtOGP1XWJZhYedjoOWu4lPK68U=; b=kavHBQqNvpnATeVov8xVG+i95jLtMxDt33CONiHa7nwlhwLyEo2I2YkY yucQbR10zj4ZWEYmQzLRDkUgKandOMAbrBawUyS7m6/+fRnfezNAm3NQ4 H/PppijHlqqKxTq5z83EN9IhhU9kfmhxH2fR+9nw0ORxd9f4SMYUHt5Ds TB0LdmYi290fFOzzASltVkmffUJWZWM9YexuRE7OPJpFUQ2L4RTOpn4yq vo8T0QInbPe6LTC7h5eVJzs4mDQ6n/3tmL+TDxy2mrJuTnlEwfKkbjoHu C4ogxdz1oUQxojB/WQH8MSLTVANhQlP33igmavjX207ya7Hp/5W+krnKW g==; X-IronPort-AV: E=McAfee;i="6500,9779,10512"; a="305803472" X-IronPort-AV: E=Sophos;i="5.95,217,1661842800"; d="scan'208";a="305803472" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Oct 2022 03:50:18 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10512"; a="610321369" X-IronPort-AV: E=Sophos;i="5.95,217,1661842800"; d="scan'208";a="610321369" Received: from silpixa00400883.ir.intel.com ([10.243.23.148]) by orsmga006.jf.intel.com with ESMTP; 27 Oct 2022 03:50:16 -0700 From: Brian Dooley To: Kai Ji Cc: dev@dpdk.org, stable@dpdk.org, gakhil@marvell.com, arkadiuszx.kusztal@intel.com, Brian Dooley , declan.doherty@intel.com Subject: [PATCH v1] crypto/qat: fix null hash algorithm digest size Date: Thu, 27 Oct 2022 10:50:14 +0000 Message-Id: <20221027105014.371696-1-brian.dooley@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add check for null hash algorithm digest size. Digest size should be 4B or request will be rejected. Fixes: 1703e94ac5ce ("qat: add driver for QuickAssist devices") Cc: declan.doherty@intel.com Cc: stable@dpdk.org Signed-off-by: Brian Dooley Acked-by: Ciara Power --- drivers/crypto/qat/qat_sym_session.c | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/drivers/crypto/qat/qat_sym_session.c b/drivers/crypto/qat/qat_sym_session.c index d96122b208..ff4b537706 100644 --- a/drivers/crypto/qat/qat_sym_session.c +++ b/drivers/crypto/qat/qat_sym_session.c @@ -2040,7 +2040,12 @@ int qat_sym_cd_auth_set(struct qat_sym_session *cdesc, hash_offset = cdesc->cd_cur_ptr-((uint8_t *)&cdesc->cd); hash = (struct icp_qat_hw_auth_setup *)cdesc->cd_cur_ptr; hash->auth_config.reserved = 0; - hash->auth_config.config = + if (cdesc->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_NULL) + hash->auth_config.config = + ICP_QAT_HW_AUTH_CONFIG_BUILD(cdesc->auth_mode, + cdesc->qat_hash_alg, 4); + else + hash->auth_config.config = ICP_QAT_HW_AUTH_CONFIG_BUILD(cdesc->auth_mode, cdesc->qat_hash_alg, digestsize); @@ -2408,10 +2413,16 @@ int qat_sym_cd_auth_set(struct qat_sym_session *cdesc, /* Auth CD config setup */ hash_cd_ctrl->hash_cfg_offset = hash_offset >> 3; hash_cd_ctrl->hash_flags = ICP_QAT_FW_AUTH_HDR_FLAG_NO_NESTED; - hash_cd_ctrl->inner_res_sz = digestsize; - hash_cd_ctrl->final_sz = digestsize; hash_cd_ctrl->inner_state1_sz = state1_size; - auth_param->auth_res_sz = digestsize; + if (cdesc->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_NULL) { + hash_cd_ctrl->inner_res_sz = 4; + hash_cd_ctrl->final_sz = 4; + auth_param->auth_res_sz = 4; + } else { + hash_cd_ctrl->inner_res_sz = digestsize; + hash_cd_ctrl->final_sz = digestsize; + auth_param->auth_res_sz = digestsize; + } hash_cd_ctrl->inner_state2_sz = state2_size; hash_cd_ctrl->inner_state2_offset = hash_cd_ctrl->hash_cfg_offset +