From patchwork Thu Oct 20 11:14:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tejasree Kondoj X-Patchwork-Id: 118783 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 32E1BA0552; Thu, 20 Oct 2022 13:15:23 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B543142D5B; Thu, 20 Oct 2022 13:15:07 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 2FFF142D45 for ; Thu, 20 Oct 2022 13:15:06 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 29K6Q4Hr008931 for ; Thu, 20 Oct 2022 04:15:05 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=9aWIQj4UiSZOpWZY1O/NfHVOk3cYDPDPpprKe4qdgwo=; b=kS1j0idhbIqcYy121a/w5GBUglDzTixMI5ljUO5m2yAPxkOBQCrKkjgsoNq8DYkNmlc2 Y8RoiDr/diuifd1oI5/mWWMfy/jrU2uIbSwauWNwY/7ChoS3DLEaKc7HWb/B4FFqtjNG 8+cp8GPLQKY9//Jsnrf4rQ2eha8CwcnJAt4YzWfmvB3+zq2ecMYP5FB3j2Q5a+16JJ0b iQD9ko96RzH7F0YqAa2hgNYqr9ONTOB4uKgjhUOfRptiUwRuIu/Xtlyd0auEdzJzKCSM mSasKDAQAbjB7knliA0qzG7MBziSWQahc19f5HuWmUWz3NkKBMr7YcIkEKioYnMUsQke GA== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3kb1258wj6-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 20 Oct 2022 04:15:05 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 20 Oct 2022 04:15:04 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 20 Oct 2022 04:15:04 -0700 Received: from hyd1554.marvell.com (unknown [10.29.57.11]) by maili.marvell.com (Postfix) with ESMTP id 6156E3F70BE; Thu, 20 Oct 2022 04:15:02 -0700 (PDT) From: Tejasree Kondoj To: Akhil Goyal CC: Anoob Joseph , Vidya Sagar Velumuri , Subject: [PATCH 11/13] crypto/cnxk: switch to SG when metabuf is allocated Date: Thu, 20 Oct 2022 16:44:51 +0530 Message-ID: <20221020111453.1982947-5-ktejasree@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221020111453.1982947-1-ktejasree@marvell.com> References: <20221020111453.1982947-1-ktejasree@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: gDq9rUstLrkTKfMs6FxAUVRuSjGEZ5Sd X-Proofpoint-ORIG-GUID: gDq9rUstLrkTKfMs6FxAUVRuSjGEZ5Sd X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-10-20_03,2022-10-20_01,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Anoob Joseph Metabuf would be allocated only when SG is required. Check the pointer instead of flags. Coverity issue: 381018 Fixes: d3bff77cc371 ("crypto/cnxk: separate out PDCP chain datapath") Signed-off-by: Anoob Joseph --- drivers/crypto/cnxk/cnxk_se.h | 33 ++++++--------------------------- 1 file changed, 6 insertions(+), 27 deletions(-) diff --git a/drivers/crypto/cnxk/cnxk_se.h b/drivers/crypto/cnxk/cnxk_se.h index abb9965d3e..ac97b864b9 100644 --- a/drivers/crypto/cnxk/cnxk_se.h +++ b/drivers/crypto/cnxk/cnxk_se.h @@ -1177,14 +1177,7 @@ cpt_enc_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens, offset_ctrl = rte_cpu_to_be_64(((uint64_t)encr_offset << 16) | ((uint64_t)iv_offset << 8) | ((uint64_t)auth_offset)); - /* - * In cn9k, cn10k since we have a limitation of - * IV & Offset control word not part of instruction - * and need to be part of Data Buffer, we check if - * head room is there and then only do the Direct mode processing - */ - if (likely((flags & ROC_SE_SINGLE_BUF_INPLACE) && - (flags & ROC_SE_SINGLE_BUF_HEADROOM))) { + if (likely(fc_params->meta_buf.vaddr == NULL)) { void *dm_vaddr = fc_params->bufs[0].vaddr; /* Use Direct mode */ @@ -1336,13 +1329,7 @@ cpt_dec_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens, offset_ctrl = rte_cpu_to_be_64(((uint64_t)encr_offset << 16) | ((uint64_t)iv_offset << 8) | ((uint64_t)auth_offset)); - /* - * In cn9k, cn10k since we have a limitation of - * IV & Offset control word not part of instruction - * and need to be part of Data Buffer, we check if - * head room is there and then only do the Direct mode processing - */ - if (likely((flags & ROC_SE_SINGLE_BUF_INPLACE) && (flags & ROC_SE_SINGLE_BUF_HEADROOM))) { + if (likely(fc_params->meta_buf.vaddr == NULL)) { void *dm_vaddr = fc_params->bufs[0].vaddr; /* Use Direct mode */ @@ -1398,6 +1385,7 @@ cpt_pdcp_chain_alg_prep(uint32_t req_flags, uint64_t d_offs, uint64_t d_lens, uint32_t encr_data_len, auth_data_len, aad_len, passthr_len, pad_len, hdr_len; uint32_t encr_offset, auth_offset, iv_offset = 0; uint8_t *auth_iv = NULL, *cipher_iv = NULL; + void *m_vaddr = params->meta_buf.vaddr; uint8_t pdcp_ci_alg, pdcp_auth_alg; union cpt_inst_w4 cpt_inst_w4; struct roc_se_ctx *se_ctx; @@ -1462,8 +1450,7 @@ cpt_pdcp_chain_alg_prep(uint32_t req_flags, uint64_t d_offs, uint64_t d_lens, inputlen += (encr_offset + pad_len); - if (likely(((req_flags & ROC_SE_SINGLE_BUF_INPLACE)) && - ((req_flags & ROC_SE_SINGLE_BUF_HEADROOM)))) { + if (likely(m_vaddr == NULL)) { dm_vaddr = params->bufs[0].vaddr; @@ -1489,9 +1476,7 @@ cpt_pdcp_chain_alg_prep(uint32_t req_flags, uint64_t d_offs, uint64_t d_lens, pdcp_iv_copy(iv_d, auth_iv, pdcp_auth_alg, pack_iv); } else { - struct roc_se_sglist_comp *scatter_comp, *gather_comp; - void *m_vaddr = params->meta_buf.vaddr; uint32_t i, g_size_bytes, s_size_bytes; uint8_t *in_buffer; uint32_t size; @@ -1711,14 +1696,7 @@ cpt_pdcp_alg_prep(uint32_t req_flags, uint64_t d_offs, uint64_t d_lens, cpt_inst_w4.s.param1 = encr_data_len; cpt_inst_w4.s.param2 = auth_data_len; - /* - * In cn9k, cn10k since we have a limitation of - * IV & Offset control word not part of instruction - * and need to be part of Data Buffer, we check if - * head room is there and then only do the Direct mode processing - */ - if (likely((req_flags & ROC_SE_SINGLE_BUF_INPLACE) && - (req_flags & ROC_SE_SINGLE_BUF_HEADROOM))) { + if (likely(params->meta_buf.vaddr == NULL)) { void *dm_vaddr = params->bufs[0].vaddr; /* Use Direct mode */ @@ -2889,6 +2867,7 @@ fill_pdcp_chain_params(struct rte_crypto_op *cop, struct cnxk_se_sess *sess, } } + fc_params.meta_buf.vaddr = NULL; if (unlikely(!((flags & ROC_SE_SINGLE_BUF_INPLACE) && (flags & ROC_SE_SINGLE_BUF_HEADROOM)))) { mdata = alloc_op_meta(&fc_params.meta_buf, m_info->mlen, m_info->pool, infl_req);