[03/13] crypto/cnxk: change capabilities as per firmware

Message ID 20221019141513.1969052-4-ktejasree@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: akhil goyal
Headers
Series [01/13] crypto/cnxk: fix length of AES-CMAC algo |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Tejasree Kondoj Oct. 19, 2022, 2:15 p.m. UTC
  Changing CPT engine capabilities structure as per
microcode.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
---
 drivers/common/cnxk/roc_mbox.h           | 5 ++++-
 drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 4 +---
 2 files changed, 5 insertions(+), 4 deletions(-)
  

Patch

diff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h
index 66a1be387d..9b57b934b1 100644
--- a/drivers/common/cnxk/roc_mbox.h
+++ b/drivers/common/cnxk/roc_mbox.h
@@ -1517,7 +1517,10 @@  union cpt_eng_caps {
 		uint64_t __io kasumi : 1;
 		uint64_t __io des : 1;
 		uint64_t __io crc : 1;
-		uint64_t __io reserved_14_63 : 50;
+		uint64_t __io mmul : 1;
+		uint64_t __io reserved_15_33 : 19;
+		uint64_t __io pdcp_chain : 1;
+		uint64_t __io reserved_35_63 : 29;
 	};
 };
 
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
index a5233a942a..e0ceaa32d5 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -449,9 +449,7 @@  cnxk_sess_fill(struct roc_cpt *roc_cpt, struct rte_crypto_sym_xform *xform,
 	bool pdcp_chain_supported = false;
 	bool ciph_then_auth = false;
 
-	if (roc_cpt->cpt_revision == ROC_CPT_REVISION_ID_96XX_B0 ||
-	    roc_cpt->cpt_revision == ROC_CPT_REVISION_ID_96XX_C0 ||
-	    roc_cpt->cpt_revision == ROC_CPT_REVISION_ID_98XX)
+	if (roc_cpt->hw_caps[CPT_ENG_TYPE_SE].pdcp_chain)
 		pdcp_chain_supported = true;
 
 	if (xform == NULL)