[v5,0/7] Introduce support for LoongArch architecture
Message ID | 20220824083123.583704-1-zhoumin@loongson.cn (mailing list archive) |
---|---|
Headers |
Return-Path: <dev-bounces@dpdk.org> X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1C8EBA00C2; Wed, 24 Aug 2022 10:31:38 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A015040DFD; Wed, 24 Aug 2022 10:31:37 +0200 (CEST) Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by mails.dpdk.org (Postfix) with ESMTP id 61F4B40DFD for <dev@dpdk.org>; Wed, 24 Aug 2022 10:31:35 +0200 (CEST) Received: from localhost.localdomain (unknown [10.2.5.185]) by localhost.localdomain (Coremail) with SMTP id AQAAf8AxFeLd4QVjtJQIAA--.38872S2; Wed, 24 Aug 2022 16:31:31 +0800 (CST) From: Min Zhou <zhoumin@loongson.cn> To: thomas@monjalon.net, david.marchand@redhat.com, bruce.richardson@intel.com, anatoly.burakov@intel.com, qiming.yang@intel.com, Yuying.Zhang@intel.com, jgrajcia@cisco.com, konstantin.v.ananyev@yandex.ru, zhoumin@loongson.cn Cc: dev@dpdk.org, maobibo@loongson.cn Subject: [PATCH v5 0/7] Introduce support for LoongArch architecture Date: Wed, 24 Aug 2022 16:31:16 +0800 Message-Id: <20220824083123.583704-1-zhoumin@loongson.cn> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID: AQAAf8AxFeLd4QVjtJQIAA--.38872S2 X-Coremail-Antispam: 1UD129KBjvJXoW3XF1kKw1fAr4xXrWxCr15Jwb_yoW7Wr1UpF WDCF9xKa1xGrZ2vr9Fqa4jgrn5A3Z7Gr129FWagry8CryIqw4DZr4xKr9FvFyxAayUtry0 gr1fuw1UWF1UWaUanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnUUvcSsGvfC2KfnxnUUI43ZEXa7xR_UUUUUUUUU== X-CM-SenderInfo: 52kr3ztlq6z05rqj20fqof0/ X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions <dev.dpdk.org> List-Unsubscribe: <https://mails.dpdk.org/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://mails.dpdk.org/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <https://mails.dpdk.org/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> Errors-To: dev-bounces@dpdk.org |
Message
zhoumin
Aug. 24, 2022, 8:31 a.m. UTC
From: zhoumin <zhoumin@loongson.cn>
Dear team,
The following patch set is intended to support DPDK running on LoongArch
architecture.
LoongArch is the general processor architecture of Loongson Corporation
and is a new RISC ISA, which is a bit like MIPS or RISC-V.
The online documents of LoongArch architecture are here:
https://loongson.github.io/LoongArch-Documentation/README-EN.html
The latest build tools for LoongArch (binary) can be downloaded from:
https://github.com/loongson/build-tools
v5:
- merge all patches for supporting LoongArch EAL into one patch
- add LoongArch cross compilation document and update some documents
related to architecture
- remove vector stubs added for LoongArch in net/i40e and net/ixgbe
- add LOONGARCH64 cross compilation job in github ci
v4:
- rebase the patchset on the main repository of version 22.07.0
v3:
- add URL for cross compile tool chain
- remove rte_lpm_lsx.h which was a dummy vector implementation
because there is already a scalar implementation, thanks to
Michal Mazurek
- modify the name of compiler for cross compiling
- remove useless variable in meson.build
v2:
- use standard atomics of toolchain to implement
atomic operations
- implement spinlock based on standard atomics
Min Zhou (7):
eal/loongarch: support LoongArch architecture
net/ixgbe: add vector stubs for LoongArch
net/memif: set memfd syscall ID on LoongArch
net/tap: set BPF syscall ID for LoongArch
examples/l3fwd: enable LoongArch operation
test/cpuflags: add test for LoongArch cpu flag
ci: add LOONGARCH64 cross compilation job
.ci/linux-build.sh | 9 +
.github/workflows/build.yml | 10 +-
MAINTAINERS | 6 +
app/test/test_cpuflags.c | 41 +++
app/test/test_xmmt_ops.h | 12 +
.../loongarch/loongarch_loongarch64_linux_gcc | 16 ++
config/loongarch/meson.build | 43 +++
doc/guides/contributing/design.rst | 2 +-
.../cross_build_dpdk_for_loongarch.rst | 87 ++++++
doc/guides/linux_gsg/index.rst | 1 +
doc/guides/nics/features.rst | 6 +
doc/guides/nics/features/default.ini | 1 +
doc/guides/nics/features/ixgbe.ini | 1 +
doc/guides/rel_notes/release_22_11.rst | 6 +
drivers/net/i40e/meson.build | 6 +
drivers/net/ixgbe/ixgbe_rxtx.c | 7 +-
drivers/net/memif/rte_eth_memif.h | 2 +
drivers/net/tap/tap_bpf.h | 2 +
examples/l3fwd/l3fwd_em.c | 8 +
lib/eal/linux/eal_memory.c | 4 +
lib/eal/loongarch/include/meson.build | 21 ++
lib/eal/loongarch/include/rte_atomic.h | 253 ++++++++++++++++++
lib/eal/loongarch/include/rte_byteorder.h | 46 ++++
lib/eal/loongarch/include/rte_cpuflags.h | 39 +++
lib/eal/loongarch/include/rte_cycles.h | 53 ++++
lib/eal/loongarch/include/rte_io.h | 18 ++
lib/eal/loongarch/include/rte_mcslock.h | 18 ++
lib/eal/loongarch/include/rte_memcpy.h | 61 +++++
lib/eal/loongarch/include/rte_pause.h | 24 ++
lib/eal/loongarch/include/rte_pflock.h | 17 ++
.../loongarch/include/rte_power_intrinsics.h | 20 ++
lib/eal/loongarch/include/rte_prefetch.h | 47 ++++
lib/eal/loongarch/include/rte_rwlock.h | 42 +++
lib/eal/loongarch/include/rte_spinlock.h | 90 +++++++
lib/eal/loongarch/include/rte_ticketlock.h | 18 ++
lib/eal/loongarch/include/rte_vect.h | 65 +++++
lib/eal/loongarch/meson.build | 11 +
lib/eal/loongarch/rte_cpuflags.c | 94 +++++++
lib/eal/loongarch/rte_cycles.c | 45 ++++
lib/eal/loongarch/rte_hypervisor.c | 11 +
lib/eal/loongarch/rte_power_intrinsics.c | 51 ++++
meson.build | 2 +
42 files changed, 1312 insertions(+), 4 deletions(-)
create mode 100644 config/loongarch/loongarch_loongarch64_linux_gcc
create mode 100644 config/loongarch/meson.build
create mode 100644 doc/guides/linux_gsg/cross_build_dpdk_for_loongarch.rst
create mode 100644 lib/eal/loongarch/include/meson.build
create mode 100644 lib/eal/loongarch/include/rte_atomic.h
create mode 100644 lib/eal/loongarch/include/rte_byteorder.h
create mode 100644 lib/eal/loongarch/include/rte_cpuflags.h
create mode 100644 lib/eal/loongarch/include/rte_cycles.h
create mode 100644 lib/eal/loongarch/include/rte_io.h
create mode 100644 lib/eal/loongarch/include/rte_mcslock.h
create mode 100644 lib/eal/loongarch/include/rte_memcpy.h
create mode 100644 lib/eal/loongarch/include/rte_pause.h
create mode 100644 lib/eal/loongarch/include/rte_pflock.h
create mode 100644 lib/eal/loongarch/include/rte_power_intrinsics.h
create mode 100644 lib/eal/loongarch/include/rte_prefetch.h
create mode 100644 lib/eal/loongarch/include/rte_rwlock.h
create mode 100644 lib/eal/loongarch/include/rte_spinlock.h
create mode 100644 lib/eal/loongarch/include/rte_ticketlock.h
create mode 100644 lib/eal/loongarch/include/rte_vect.h
create mode 100644 lib/eal/loongarch/meson.build
create mode 100644 lib/eal/loongarch/rte_cpuflags.c
create mode 100644 lib/eal/loongarch/rte_cycles.c
create mode 100644 lib/eal/loongarch/rte_hypervisor.c
create mode 100644 lib/eal/loongarch/rte_power_intrinsics.c