From patchwork Sat Aug 20 02:31:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Vargas, Hernan" X-Patchwork-Id: 115265 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D1585A034C; Fri, 19 Aug 2022 20:36:59 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 039EA42905; Fri, 19 Aug 2022 20:36:21 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id 15B6C41155 for ; Fri, 19 Aug 2022 20:36:14 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660934175; x=1692470175; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=K+7V3ZBwhMwy3AJDceY/GdlYYnorjt9/kTOcz8X9zW4=; b=QD3OP1yQXnXKFnrx1uGCyhommCH6URt1T7WGk11tvRuzpa3IEDxZ0Ij/ lsq7QzFIfv7Ep9zS8Udp+j5C0jPXFkokVwSyJRbcRIOPWorBRYcRow9CI jSy1+Jyv/zaScGsjB/L86BAHazcgolyF+gb/9OL1MHRNllVZyptA+z3BF MP3+DTCJqER0fOoNN87Ft0XAo9Rlc4/kx2BTVGsPrTEUgKpUyotrVrgsv GDG/8cS85erkaB5M0fqeDCg82uj7EB+yNKswRTUAJfH9g6LVyc/lx91lf YPNNNbXck8qQYW1h5bpTGyr7qYdgDTVR3JSTL/1uhSu0W6+cb8zUsKSgB w==; X-IronPort-AV: E=McAfee;i="6500,9779,10444"; a="319107226" X-IronPort-AV: E=Sophos;i="5.93,248,1654585200"; d="scan'208";a="319107226" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Aug 2022 11:36:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,248,1654585200"; d="scan'208";a="608296256" Received: from unknown (HELO csl-npg-qt0.la.intel.com) ([10.233.181.103]) by orsmga002.jf.intel.com with ESMTP; 19 Aug 2022 11:36:14 -0700 From: Hernan Vargas To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com, Hernan Vargas Subject: [PATCH v2 07/37] baseband/acc100: add LDPC encoder padding function Date: Fri, 19 Aug 2022 19:31:27 -0700 Message-Id: <20220820023157.189047-8-hernan.vargas@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220820023157.189047-1-hernan.vargas@intel.com> References: <20220820023157.189047-1-hernan.vargas@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org LDPC Encoder input may need to be padded to avoid small beat for ACC100. Padding 5GDL input buffer length (BLEN) to avoid case (BLEN % 64) <= 8. Adding protection for corner case to avoid for 5GDL occurrence of last beat within the ACC100 fabric with <= 8B which might trigger a fabric corner case hang issue. Signed-off-by: Hernan Vargas --- drivers/baseband/acc100/rte_acc100_pmd.c | 28 ++++++++++++++---------- 1 file changed, 16 insertions(+), 12 deletions(-) diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c index cc7d146e74..4849d822d1 100644 --- a/drivers/baseband/acc100/rte_acc100_pmd.c +++ b/drivers/baseband/acc100/rte_acc100_pmd.c @@ -1304,7 +1304,6 @@ acc100_fcw_td_fill(const struct rte_bbdev_dec_op *op, struct acc100_fcw_td *fcw) RTE_BBDEV_TURBO_HALF_ITERATION_EVEN); } -#ifdef RTE_LIBRTE_BBDEV_DEBUG static inline bool is_acc100(struct acc100_queue *q) @@ -1317,7 +1316,6 @@ validate_op_required(struct acc100_queue *q) { return is_acc100(q); } -#endif /* Fill in a frame control word for LDPC decoding. */ static inline void @@ -1773,12 +1771,24 @@ acc100_dma_desc_te_fill(struct rte_bbdev_enc_op *op, return 0; } +/* May need to pad LDPC Encoder input to avoid small beat for ACC100 */ +static inline uint16_t +pad_le_in(uint16_t blen, struct acc100_queue *q) +{ + if (!is_acc100(q)) + return blen; + uint16_t last_beat = blen % 64; + if ((last_beat > 0) && (last_beat <= 8)) + blen += 8; + return blen; +} + static inline int acc100_dma_desc_le_fill(struct rte_bbdev_enc_op *op, struct acc100_dma_req_desc *desc, struct rte_mbuf **input, struct rte_mbuf *output, uint32_t *in_offset, uint32_t *out_offset, uint32_t *out_length, - uint32_t *mbuf_total_left, uint32_t *seg_total_left) + uint32_t *mbuf_total_left, uint32_t *seg_total_left, struct acc100_queue *q) { int next_triplet = 1; /* FCW already done */ uint16_t K, in_length_in_bits, in_length_in_bytes; @@ -1802,8 +1812,7 @@ acc100_dma_desc_le_fill(struct rte_bbdev_enc_op *op, } next_triplet = acc100_dma_fill_blk_type_in(desc, input, in_offset, - in_length_in_bytes, - seg_total_left, next_triplet); + pad_le_in(in_length_in_bytes, q), seg_total_left, next_triplet); if (unlikely(next_triplet < 0)) { rte_bbdev_log(ERR, "Mismatch between data to process and mbuf data length in bbdev_op: %p", @@ -2531,7 +2540,7 @@ enqueue_ldpc_enc_n_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ops, acc100_header_init(&desc->req); desc->req.numCBs = num; - in_length_in_bytes = ops[0]->ldpc_enc.input.data->data_len; + in_length_in_bytes = pad_le_in(ops[0]->ldpc_enc.input.data->data_len, q); out_length = (enc->cb_params.e + 7) >> 3; desc->req.m2dlen = 1 + num; desc->req.d2mlen = num; @@ -2600,7 +2609,7 @@ enqueue_ldpc_enc_one_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op *op, ret = acc100_dma_desc_le_fill(op, &desc->req, &input, output, &in_offset, &out_offset, &out_length, &mbuf_total_left, - &seg_total_left); + &seg_total_left, q); if (unlikely(ret < 0)) return ret; @@ -3921,9 +3930,6 @@ dequeue_enc_one_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ref_op, /* Clearing status, it will be set based on response */ op->status = 0; - - op->status |= ((rsp.input_err) - ? (1 << RTE_BBDEV_DATA_ERROR) : 0); op->status |= ((rsp.dma_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0); op->status |= ((rsp.fcw_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0); @@ -3994,8 +4000,6 @@ dequeue_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op **ref_op, rte_bbdev_log_debug("Resp. desc %p: %x", desc, rsp.val); - op->status |= ((rsp.input_err) - ? (1 << RTE_BBDEV_DATA_ERROR) : 0); op->status |= ((rsp.dma_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0); op->status |= ((rsp.fcw_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);