From patchwork Sat Aug 20 02:31:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hernan Vargas X-Patchwork-Id: 115282 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C8251A034C; Fri, 19 Aug 2022 20:38:47 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2140E42BCD; Fri, 19 Aug 2022 20:36:37 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id 1142C41155 for ; Fri, 19 Aug 2022 20:36:22 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660934183; x=1692470183; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=TsN6lAp5GayffGQOk+tuOWKWbonMYgv27Sa+jjV6KWw=; b=O3z064GIhNj8w7/Gy07G3G57Z4+UZyf9oPx3FXmifKzDkAhjhinGehVR yMkJFcf7q+/9Ny1sX/7+Fd+4RV6G/xUZnTyKw7VJ7NjkuoD2KkDXBlhOw jx6bNUPPVhRwCUIYt66ojeF63qMvUBrqw5BM+5KPRPoKrq+GQYQrJbrks DlwEzaj0YZXxGB/pvFDmpTIXKTckweEjGno7EG2E8wuliv62hyb8cgv8r AY9KZpoAklQ7UDp/QoqVJAss0WrkzvKBYu1vdQMJL/5507deHkTf+L8ho Zcl88FzW4/UmlxluPtbvR22kvXDg5y4BkKwXV5PnHAYOqG9HP4Z3ABa2f g==; X-IronPort-AV: E=McAfee;i="6500,9779,10444"; a="319107294" X-IronPort-AV: E=Sophos;i="5.93,248,1654585200"; d="scan'208";a="319107294" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Aug 2022 11:36:22 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,248,1654585200"; d="scan'208";a="608296326" Received: from unknown (HELO csl-npg-qt0.la.intel.com) ([10.233.181.103]) by orsmga002.jf.intel.com with ESMTP; 19 Aug 2022 11:36:22 -0700 From: Hernan Vargas To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com, Hernan Vargas Subject: [PATCH v2 24/37] baseband/acc100: rename ldpc encode function arg Date: Fri, 19 Aug 2022 19:31:44 -0700 Message-Id: <20220820023157.189047-25-hernan.vargas@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220820023157.189047-1-hernan.vargas@intel.com> References: <20220820023157.189047-1-hernan.vargas@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Rename total_enqueued_cbs to total_enqueued_descs in the enqueue_ldpc_enc_n_op_cb function. No functional impact. Signed-off-by: Hernan Vargas Reviewed-by: Maxime Coquelin --- drivers/baseband/acc100/rte_acc100_pmd.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c index 0389768a6f..a302905c78 100644 --- a/drivers/baseband/acc100/rte_acc100_pmd.c +++ b/drivers/baseband/acc100/rte_acc100_pmd.c @@ -2967,10 +2967,13 @@ enqueue_enc_one_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op *op, return 1; } -/* Enqueue one encode operations for ACC100 device in CB mode */ + +/* Enqueue one encode operations for ACC100 device in CB mode + * multiplexed on the same descriptor + */ static inline int enqueue_ldpc_enc_n_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ops, - uint16_t total_enqueued_cbs, int16_t num) + uint16_t total_enqueued_descs, int16_t num) { union acc100_dma_desc *desc = NULL; uint32_t out_length; @@ -2980,14 +2983,13 @@ enqueue_ldpc_enc_n_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ops, struct rte_bbdev_op_ldpc_enc *enc = &ops[0]->ldpc_enc; #ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE - /* Validate op structure */ if (validate_ldpc_enc_op(ops[0], q) == -1) { rte_bbdev_log(ERR, "LDPC encoder validation rejected"); return -EINVAL; } #endif - uint16_t desc_idx = ((q->sw_ring_head + total_enqueued_cbs) + uint16_t desc_idx = ((q->sw_ring_head + total_enqueued_descs) & q->sw_ring_wrap_mask); desc = q->ring_addr + desc_idx; acc100_fcw_le_fill(ops[0], &desc->req.fcw_le, num, 0);