From patchwork Sat Aug 20 02:31:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Vargas, Hernan" X-Patchwork-Id: 115259 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 92DB9A034C; Fri, 19 Aug 2022 20:36:19 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id F1C17410FB; Fri, 19 Aug 2022 20:36:14 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id 0F90340689 for ; Fri, 19 Aug 2022 20:36:12 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660934173; x=1692470173; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2Qrv6P6NdVpI7NOMmrtxUvxcMhN7GKDgcRE4n7y2jyQ=; b=cS8grZRMB4z5K74CuxJt360TfG46CDTdIW8puSH64sH7BYtB3LEFzNK/ +auqoFA4ps7+yVYSC8s7ofKvLgQPqksBHm9VHNph0IKBrVXlmyJ964RVS 91sSzvyHn7IlGIapfPkb0JPktgXVnTOu4xr/OBlKGVFBnaUXog84AGu5U DXTRSADn1RzAObNhBdQRe36vjHA84eqKiF74VwdMccB6a/UpRsiWttAgp vJmM8NX38JAEOGnh0V2Yx7y9zXEim+Vsl7RAT+6gHMbnq00ayRcvX30hY tI0Rb9wUK/OiQPKXXToAkMNHsdiY0cRPvGD7HH6Jnb6j2YW4+uIhEckTY Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10444"; a="319107206" X-IronPort-AV: E=Sophos;i="5.93,248,1654585200"; d="scan'208";a="319107206" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Aug 2022 11:36:11 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,248,1654585200"; d="scan'208";a="608296224" Received: from unknown (HELO csl-npg-qt0.la.intel.com) ([10.233.181.103]) by orsmga002.jf.intel.com with ESMTP; 19 Aug 2022 11:36:11 -0700 From: Hernan Vargas To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com, Hernan Vargas Subject: [PATCH v2 01/37] baseband/acc100: add enqueue status Date: Fri, 19 Aug 2022 19:31:21 -0700 Message-Id: <20220820023157.189047-2-hernan.vargas@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220820023157.189047-1-hernan.vargas@intel.com> References: <20220820023157.189047-1-hernan.vargas@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add enqueue status as part of rte_bbdev_queue_data. This is a new feature to update queue status and indicate the reason why a previous enqueue may or may not have consumed all requested operations. Signed-off-by: Hernan Vargas Reviewed-by: Maxime Coquelin --- drivers/baseband/acc100/rte_acc100_pmd.c | 85 ++++++++++++++++++++---- 1 file changed, 71 insertions(+), 14 deletions(-) diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c index a68a9b0fd9..7f698ec3d2 100644 --- a/drivers/baseband/acc100/rte_acc100_pmd.c +++ b/drivers/baseband/acc100/rte_acc100_pmd.c @@ -3436,6 +3436,35 @@ get_num_cbs_in_tb_ldpc_dec(struct rte_bbdev_op_ldpc_dec *ldpc_dec) return cbs_in_tb; } +static inline void +acc100_enqueue_status(struct rte_bbdev_queue_data *q_data, + enum rte_bbdev_enqueue_status status) +{ + q_data->enqueue_status = status; + q_data->queue_stats.enqueue_status_count[status]++; + rte_bbdev_log(WARNING, "Enqueue Status: %d %#"PRIx64"", + status, + q_data->queue_stats.enqueue_status_count[status]); +} + +static inline void +acc100_enqueue_invalid(struct rte_bbdev_queue_data *q_data) +{ + acc100_enqueue_status(q_data, RTE_BBDEV_ENQ_STATUS_INVALID_OP); +} + +static inline void +acc100_enqueue_ring_full(struct rte_bbdev_queue_data *q_data) +{ + acc100_enqueue_status(q_data, RTE_BBDEV_ENQ_STATUS_RING_FULL); +} + +static inline void +acc100_enqueue_queue_full(struct rte_bbdev_queue_data *q_data) +{ + acc100_enqueue_status(q_data, RTE_BBDEV_ENQ_STATUS_QUEUE_FULL); +} + /* Enqueue encode operations for ACC100 device in CB mode. */ static uint16_t acc100_enqueue_enc_cb(struct rte_bbdev_queue_data *q_data, @@ -3449,13 +3478,17 @@ acc100_enqueue_enc_cb(struct rte_bbdev_queue_data *q_data, for (i = 0; i < num; ++i) { /* Check if there are available space for further processing */ - if (unlikely(avail - 1 < 0)) + if (unlikely(avail - 1 < 0)) { + acc100_enqueue_ring_full(q_data); break; + } avail -= 1; ret = enqueue_enc_one_op_cb(q, ops[i], i); - if (ret < 0) + if (ret < 0) { + acc100_enqueue_invalid(q_data); break; + } } if (unlikely(i == 0)) @@ -3505,20 +3538,26 @@ acc100_enqueue_ldpc_enc_cb(struct rte_bbdev_queue_data *q_data, int16_t enq, left = num; while (left > 0) { - if (unlikely(avail < 1)) + if (unlikely(avail < 1)) { + acc100_enqueue_ring_full(q_data); break; + } avail--; enq = RTE_MIN(left, ACC100_MUX_5GDL_DESC); if (check_mux(&ops[i], enq)) { ret = enqueue_ldpc_enc_n_op_cb(q, &ops[i], desc_idx, enq); - if (ret < 0) + if (ret < 0) { + acc100_enqueue_invalid(q_data); break; + } i += enq; } else { ret = enqueue_ldpc_enc_one_op_cb(q, ops[i], desc_idx); - if (ret < 0) + if (ret < 0) { + acc100_enqueue_invalid(q_data); break; + } i++; } desc_idx++; @@ -3557,13 +3596,17 @@ acc100_enqueue_enc_tb(struct rte_bbdev_queue_data *q_data, for (i = 0; i < num; ++i) { cbs_in_tb = get_num_cbs_in_tb_enc(&ops[i]->turbo_enc); /* Check if there are available space for further processing */ - if (unlikely(avail - cbs_in_tb < 0)) + if (unlikely(avail - cbs_in_tb < 0)) { + acc100_enqueue_ring_full(q_data); break; + } avail -= cbs_in_tb; ret = enqueue_enc_one_op_tb(q, ops[i], enqueued_cbs, cbs_in_tb); - if (ret < 0) + if (ret < 0) { + acc100_enqueue_invalid(q_data); break; + } enqueued_cbs += ret; } if (unlikely(enqueued_cbs == 0)) @@ -3618,13 +3661,17 @@ acc100_enqueue_dec_cb(struct rte_bbdev_queue_data *q_data, for (i = 0; i < num; ++i) { /* Check if there are available space for further processing */ - if (unlikely(avail - 1 < 0)) + if (unlikely(avail - 1 < 0)) { + acc100_enqueue_ring_full(q_data); break; + } avail -= 1; ret = enqueue_dec_one_op_cb(q, ops[i], i); - if (ret < 0) + if (ret < 0) { + acc100_enqueue_invalid(q_data); break; + } } if (unlikely(i == 0)) @@ -3678,8 +3725,10 @@ acc100_enqueue_ldpc_dec_tb(struct rte_bbdev_queue_data *q_data, ret = enqueue_ldpc_dec_one_op_tb(q, ops[i], enqueued_cbs, cbs_in_tb); - if (ret < 0) + if (ret < 0) { + acc100_enqueue_invalid(q_data); break; + } enqueued_cbs += ret; } @@ -3704,8 +3753,10 @@ acc100_enqueue_ldpc_dec_cb(struct rte_bbdev_queue_data *q_data, bool same_op = false; for (i = 0; i < num; ++i) { /* Check if there are available space for further processing */ - if (unlikely(avail < 1)) + if (unlikely(avail < 1)) { + acc100_enqueue_ring_full(q_data); break; + } avail -= 1; if (i > 0) @@ -3718,8 +3769,10 @@ acc100_enqueue_ldpc_dec_cb(struct rte_bbdev_queue_data *q_data, ops[i]->ldpc_dec.n_filler, ops[i]->ldpc_dec.cb_params.e, same_op); ret = enqueue_ldpc_dec_one_op_cb(q, ops[i], i, same_op); - if (ret < 0) + if (ret < 0) { + acc100_enqueue_invalid(q_data); break; + } } if (unlikely(i == 0)) @@ -3755,13 +3808,17 @@ acc100_enqueue_dec_tb(struct rte_bbdev_queue_data *q_data, for (i = 0; i < num; ++i) { cbs_in_tb = get_num_cbs_in_tb_dec(&ops[i]->turbo_dec); /* Check if there are available space for further processing */ - if (unlikely(avail - cbs_in_tb < 0)) + if (unlikely(avail - cbs_in_tb < 0)) { + acc100_enqueue_ring_full(q_data); break; + } avail -= cbs_in_tb; ret = enqueue_dec_one_op_tb(q, ops[i], enqueued_cbs, cbs_in_tb); - if (ret < 0) + if (ret < 0) { + acc100_enqueue_invalid(q_data); break; + } enqueued_cbs += ret; }