diff mbox series

[v2,17/37] baseband/acc100: configure PMON control registers

Message ID 20220820023157.189047-18-hernan.vargas@intel.com (mailing list archive)
State Superseded, archived
Delegated to: akhil goyal
Headers show
Series baseband/acc100: changes for 22.11 | expand

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Hernan Vargas Aug. 20, 2022, 2:31 a.m. UTC
Adding back feature from ACC101.
Expose the device status and add protection for corner cases.
Enable performance monitor control registers.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/acc100_pf_enum.h | 52 +++++++++++++++++++++---
 drivers/baseband/acc100/acc100_pmd.h     |  9 +++-
 drivers/baseband/acc100/acc100_vf_enum.h |  6 +++
 drivers/baseband/acc100/rte_acc100_pmd.c | 13 ++++++
 4 files changed, 74 insertions(+), 6 deletions(-)

Comments

Maxime Coquelin Sept. 15, 2022, 9:12 a.m. UTC | #1
On 8/20/22 04:31, Hernan Vargas wrote:
> Adding back feature from ACC101.
> Expose the device status and add protection for corner cases.
> Enable performance monitor control registers.
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/acc100_pf_enum.h | 52 +++++++++++++++++++++---
>   drivers/baseband/acc100/acc100_pmd.h     |  9 +++-
>   drivers/baseband/acc100/acc100_vf_enum.h |  6 +++
>   drivers/baseband/acc100/rte_acc100_pmd.c | 13 ++++++
>   4 files changed, 74 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/acc100_pf_enum.h b/drivers/baseband/acc100/acc100_pf_enum.h
> index 2fba667627..d6a37a4147 100644
> --- a/drivers/baseband/acc100/acc100_pf_enum.h
> +++ b/drivers/baseband/acc100/acc100_pf_enum.h
> @@ -14,6 +14,7 @@
>   enum {
>   	HWPfQmgrEgressQueuesTemplate          =  0x0007FE00,
>   	HWPfQmgrIngressAq                     =  0x00080000,
> +	HWPfAramStatus                        =  0x00810000,
>   	HWPfQmgrArbQAvail                     =  0x00A00010,
>   	HWPfQmgrArbQBlock                     =  0x00A00014,
>   	HWPfQmgrAqueueDropNotifEn             =  0x00A00024,
> @@ -127,6 +128,9 @@ enum {
>   	HWPfDmaConfigUnexpComplDataEn         =  0x00B808A8,
>   	HWPfDmaConfigUnexpComplDescrEn        =  0x00B808AC,
>   	HWPfDmaConfigPtoutOutEn               =  0x00B808B0,
> +	HWPfDmaClusterHangCtrl                =  0x00B80E00,
> +	HWPfDmaClusterHangThld                =  0x00B80E04,
> +	HWPfDmaStopAxiThreshold               =  0x00B80F3C,
>   	HWPfDmaFec5GulDescBaseLoRegVf         =  0x00B88020,
>   	HWPfDmaFec5GulDescBaseHiRegVf         =  0x00B88024,
>   	HWPfDmaFec5GulRespPtrLoRegVf          =  0x00B88028,
> @@ -328,11 +332,27 @@ enum {
>   	HwPfFecUl5g8IbDebugReg                =  0x00BC8200,
>   	HwPfFecUl5g8ObLlrDebugReg             =  0x00BC8204,
>   	HwPfFecUl5g8ObHarqDebugReg            =  0x00BC8208,
> -	HWPfFecDl5gCntrlReg                   =  0x00BCF000,
> -	HWPfFecDl5gI2MThreshReg               =  0x00BCF004,
> -	HWPfFecDl5gVersionReg                 =  0x00BCF100,
> -	HWPfFecDl5gFcwStatusReg               =  0x00BCF104,
> -	HWPfFecDl5gWarnReg                    =  0x00BCF108,
> +	HwPfFecDl5g0CntrlReg                  =  0x00BCD000,
> +	HwPfFecDl5g0I2MThreshReg              =  0x00BCD004,
> +	HwPfFecDl5g0VersionReg                =  0x00BCD100,
> +	HwPfFecDl5g0FcwStatusReg              =  0x00BCD104,
> +	HwPfFecDl5g0WarnReg                   =  0x00BCD108,
> +	HwPfFecDl5g0IbDebugReg                =  0x00BCD200,
> +	HwPfFecDl5g0ObDebugReg                =  0x00BCD204,
> +	HwPfFecDl5g1CntrlReg                  =  0x00BCE000,
> +	HwPfFecDl5g1I2MThreshReg              =  0x00BCE004,
> +	HwPfFecDl5g1VersionReg                =  0x00BCE100,
> +	HwPfFecDl5g1FcwStatusReg              =  0x00BCE104,
> +	HwPfFecDl5g1WarnReg                   =  0x00BCE108,
> +	HwPfFecDl5g1IbDebugReg                =  0x00BCE200,
> +	HwPfFecDl5g1ObDebugReg                =  0x00BCE204,
> +	HwPfFecDl5g2CntrlReg                  =  0x00BCF000,
> +	HwPfFecDl5g2I2MThreshReg              =  0x00BCF004,
> +	HwPfFecDl5g2VersionReg                =  0x00BCF100,
> +	HwPfFecDl5g2FcwStatusReg              =  0x00BCF104,
> +	HwPfFecDl5g2WarnReg                   =  0x00BCF108,
> +	HwPfFecDl5g2IbDebugReg                =  0x00BCF200,
> +	HwPfFecDl5g2ObDebugReg                =  0x00BCF204,
>   	HWPfFecUlVersionReg                   =  0x00BD0000,
>   	HWPfFecUlControlReg                   =  0x00BD0004,
>   	HWPfFecUlStatusReg                    =  0x00BD0008,
> @@ -345,6 +365,12 @@ enum {
>   	HWPfFecDlClusterStatusReg3            =  0x00BDF04C,
>   	HWPfFecDlClusterStatusReg4            =  0x00BDF050,
>   	HWPfFecDlClusterStatusReg5            =  0x00BDF054,
> +	HwPfWbbThreshold                      =  0x00C20000,
> +	HwPfWbbSpare                          =  0x00C20004,
> +	HwPfWbbDebugCtl                       =  0x00C20010,
> +	HwPfWbbDebug                          =  0x00C20014,
> +	HwPfWbbError                          =  0x00C20020,
> +	HwPfWbbErrorInjecti                   =  0x00C20024,
>   	HWPfChaFabPllPllrst                   =  0x00C40000,
>   	HWPfChaFabPllClk0                     =  0x00C40004,
>   	HWPfChaFabPllClk1                     =  0x00C40008,
> @@ -527,6 +553,10 @@ enum {
>   	HWPfHiDebugMemSnoopMsiFifo            =  0x00C841F8,
>   	HWPfHiDebugMemSnoopInputFifo          =  0x00C841FC,
>   	HWPfHiMsixMappingConfig               =  0x00C84200,
> +	HWPfHiErrInjectReg                    =  0x00C84204,
> +	HWPfHiErrStatusReg                    =  0x00C84208,
> +	HWPfHiErrMaskReg                      =  0x00C8420C,
> +	HWPfHiErrFatalReg                     =  0x00C84210,
>   	HWPfHiJunkReg                         =  0x00C8FF00,
>   	HWPfDdrUmmcVer                        =  0x00D00000,
>   	HWPfDdrUmmcCap                        =  0x00D00010,
> @@ -545,6 +575,7 @@ enum {
>   	HWPfDdrMpcPbw2                        =  0x00D00130,
>   	HWPfDdrMpcPbw1                        =  0x00D00140,
>   	HWPfDdrMpcPbw0                        =  0x00D00150,
> +	HwPfDdrUmmcEccErrInj                  =  0x00D00190,
>   	HWPfDdrMemoryInit                     =  0x00D00200,
>   	HWPfDdrMemoryInitDone                 =  0x00D00210,
>   	HWPfDdrMemInitPhyTrng0                =  0x00D00240,
> @@ -876,6 +907,7 @@ enum {
>   	HwPfPcieSupFence                      =  0x00D8086C,
>   	HwPfPcieSupMtcs                       =  0x00D80870,
>   	HwPfPcieSupStatsum                    =  0x00D809B8,
> +	HwPfPcieRomVersion                    =  0x00D80B0C,
>   	HwPfPciePcsDpStatus0                  =  0x00D81000,
>   	HwPfPciePcsDpControl0                 =  0x00D81004,
>   	HwPfPciePcsPmaStatusLane0             =  0x00D81008,
> @@ -1081,6 +1113,16 @@ enum {
>   	ACC100_PF_INT_QMGR_ERR = 13,
>   	ACC100_PF_INT_INT_REQ_OVERFLOW = 14,
>   	ACC100_PF_INT_APB_TIMEOUT = 15,
> +	ACC100_PF_INT_CORE_HANG = 16,
> +	ACC100_PF_INT_CLUSTER_HANG = 17,
> +	ACC100_PF_INT_WBB_ERROR = 18,
> +	ACC100_PF_INT_5G_EXTRAREAD = 24,
> +	ACC100_PF_INT_5G_READ_TIMEOUT = 25,
> +	ACC100_PF_INT_5G_ERROR = 26,
> +	ACC100_PF_INT_PCIE_ERROR = 27,
> +	ACC100_PF_INT_DDR_ERROR = 28,
> +	ACC100_PF_INT_MISC_ERROR = 29,
> +	ACC100_PF_INT_I2C = 30,
>   };
>   
>   #endif /* ACC100_PF_ENUM_H */
> diff --git a/drivers/baseband/acc100/acc100_pmd.h b/drivers/baseband/acc100/acc100_pmd.h
> index 20157e5886..27801767b7 100644
> --- a/drivers/baseband/acc100/acc100_pmd.h
> +++ b/drivers/baseband/acc100/acc100_pmd.h
> @@ -215,7 +215,8 @@ union acc100_dma_rsp_desc {
>   			timestampEn:1,
>   			iterCountFrac:8,
>   			iter_cnt:8,
> -			rsrvd3:6,
> +			harq_failure:1,
> +			rsrvd3:5,
>   			sdone:1,
>   			fdone:1;
>   		uint32_t add_info_0;
> @@ -508,6 +509,8 @@ struct acc100_registry_addr {
>   	unsigned int depth_log1_offset;
>   	unsigned int qman_group_func;
>   	unsigned int ddr_range;
> +	unsigned int pmon_ctrl_a;
> +	unsigned int pmon_ctrl_b;
>   };
>   
>   /* Structure holding registry addresses for PF */
> @@ -537,6 +540,8 @@ static const struct acc100_registry_addr pf_reg_addr = {
>   	.depth_log1_offset = HWPfQmgrGrpDepthLog21Vf,
>   	.qman_group_func = HWPfQmgrGrpFunction0,
>   	.ddr_range = HWPfDmaVfDdrBaseRw,
> +	.pmon_ctrl_a = HWPfPermonACntrlRegVf,
> +	.pmon_ctrl_b = HWPfPermonBCntrlRegVf,
>   };
>   
>   /* Structure holding registry addresses for VF */
> @@ -566,6 +571,8 @@ static const struct acc100_registry_addr vf_reg_addr = {
>   	.depth_log1_offset = HWVfQmgrGrpDepthLog21Vf,
>   	.qman_group_func = HWVfQmgrGrpFunction0Vf,
>   	.ddr_range = HWVfDmaDdrBaseRangeRoVf,
> +	.pmon_ctrl_a = HWVfPmACntrlRegVf,
> +	.pmon_ctrl_b = HWVfPmBCntrlRegVf,
>   };
>   
>   /* Structure associated with each queue. */
> diff --git a/drivers/baseband/acc100/acc100_vf_enum.h b/drivers/baseband/acc100/acc100_vf_enum.h
> index b512af33fc..5807a9d0fd 100644
> --- a/drivers/baseband/acc100/acc100_vf_enum.h
> +++ b/drivers/baseband/acc100/acc100_vf_enum.h
> @@ -70,4 +70,10 @@ enum {
>   	ACC100_VF_INT_QMGR_AQ_OVERTHRESHOLD = 9,
>   };
>   
> +/* TIP PF2VF Comms */
> +enum {
> +	ACC100_VF2PF_STATUS_REQUEST = 0,
> +	ACC100_VF2PF_USING_VF = 1,
> +};
> +
>   #endif /* ACC100_VF_ENUM_H */
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index ea54152856..9c15797503 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -292,6 +292,13 @@ fetch_acc100_config(struct rte_bbdev *dev)
>   			acc100_conf->q_dl_5g.aq_depth_log2);
>   }
>   
> +static inline void
> +acc100_vf2pf(struct acc100_device *d, unsigned int payload)
> +{
> +	if (d->device_variant == ACC101_VARIANT)
> +		acc100_reg_write(d, HWVfHiVfToPfDbellVf, payload);
> +}
> +
>   static void
>   free_base_addresses(void **base_addrs, int size)
>   {
> @@ -646,6 +653,11 @@ acc100_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
>   	/* Read the populated cfg from ACC100 registers */
>   	fetch_acc100_config(dev);
>   
> +	for (value = 0; value <= 2; value++) {
> +		acc100_reg_write(d, reg_addr->pmon_ctrl_a, value);
> +		acc100_reg_write(d, reg_addr->pmon_ctrl_b, value);
> +	}
> +
>   	/* Release AXI from PF */
>   	if (d->pf_device)
>   		acc100_reg_write(d, HWPfDmaAxiControl, 1);
> @@ -712,6 +724,7 @@ acc100_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
>   
>   	/* Mark as configured properly */
>   	d->configured = true;
> +	acc100_vf2pf(d, ACC100_VF2PF_USING_VF);
>   
>   	rte_bbdev_log_debug(
>   			"ACC100 (%s) configured  sw_rings = %p, sw_rings_iova = %#"

Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime
diff mbox series

Patch

diff --git a/drivers/baseband/acc100/acc100_pf_enum.h b/drivers/baseband/acc100/acc100_pf_enum.h
index 2fba667627..d6a37a4147 100644
--- a/drivers/baseband/acc100/acc100_pf_enum.h
+++ b/drivers/baseband/acc100/acc100_pf_enum.h
@@ -14,6 +14,7 @@ 
 enum {
 	HWPfQmgrEgressQueuesTemplate          =  0x0007FE00,
 	HWPfQmgrIngressAq                     =  0x00080000,
+	HWPfAramStatus                        =  0x00810000,
 	HWPfQmgrArbQAvail                     =  0x00A00010,
 	HWPfQmgrArbQBlock                     =  0x00A00014,
 	HWPfQmgrAqueueDropNotifEn             =  0x00A00024,
@@ -127,6 +128,9 @@  enum {
 	HWPfDmaConfigUnexpComplDataEn         =  0x00B808A8,
 	HWPfDmaConfigUnexpComplDescrEn        =  0x00B808AC,
 	HWPfDmaConfigPtoutOutEn               =  0x00B808B0,
+	HWPfDmaClusterHangCtrl                =  0x00B80E00,
+	HWPfDmaClusterHangThld                =  0x00B80E04,
+	HWPfDmaStopAxiThreshold               =  0x00B80F3C,
 	HWPfDmaFec5GulDescBaseLoRegVf         =  0x00B88020,
 	HWPfDmaFec5GulDescBaseHiRegVf         =  0x00B88024,
 	HWPfDmaFec5GulRespPtrLoRegVf          =  0x00B88028,
@@ -328,11 +332,27 @@  enum {
 	HwPfFecUl5g8IbDebugReg                =  0x00BC8200,
 	HwPfFecUl5g8ObLlrDebugReg             =  0x00BC8204,
 	HwPfFecUl5g8ObHarqDebugReg            =  0x00BC8208,
-	HWPfFecDl5gCntrlReg                   =  0x00BCF000,
-	HWPfFecDl5gI2MThreshReg               =  0x00BCF004,
-	HWPfFecDl5gVersionReg                 =  0x00BCF100,
-	HWPfFecDl5gFcwStatusReg               =  0x00BCF104,
-	HWPfFecDl5gWarnReg                    =  0x00BCF108,
+	HwPfFecDl5g0CntrlReg                  =  0x00BCD000,
+	HwPfFecDl5g0I2MThreshReg              =  0x00BCD004,
+	HwPfFecDl5g0VersionReg                =  0x00BCD100,
+	HwPfFecDl5g0FcwStatusReg              =  0x00BCD104,
+	HwPfFecDl5g0WarnReg                   =  0x00BCD108,
+	HwPfFecDl5g0IbDebugReg                =  0x00BCD200,
+	HwPfFecDl5g0ObDebugReg                =  0x00BCD204,
+	HwPfFecDl5g1CntrlReg                  =  0x00BCE000,
+	HwPfFecDl5g1I2MThreshReg              =  0x00BCE004,
+	HwPfFecDl5g1VersionReg                =  0x00BCE100,
+	HwPfFecDl5g1FcwStatusReg              =  0x00BCE104,
+	HwPfFecDl5g1WarnReg                   =  0x00BCE108,
+	HwPfFecDl5g1IbDebugReg                =  0x00BCE200,
+	HwPfFecDl5g1ObDebugReg                =  0x00BCE204,
+	HwPfFecDl5g2CntrlReg                  =  0x00BCF000,
+	HwPfFecDl5g2I2MThreshReg              =  0x00BCF004,
+	HwPfFecDl5g2VersionReg                =  0x00BCF100,
+	HwPfFecDl5g2FcwStatusReg              =  0x00BCF104,
+	HwPfFecDl5g2WarnReg                   =  0x00BCF108,
+	HwPfFecDl5g2IbDebugReg                =  0x00BCF200,
+	HwPfFecDl5g2ObDebugReg                =  0x00BCF204,
 	HWPfFecUlVersionReg                   =  0x00BD0000,
 	HWPfFecUlControlReg                   =  0x00BD0004,
 	HWPfFecUlStatusReg                    =  0x00BD0008,
@@ -345,6 +365,12 @@  enum {
 	HWPfFecDlClusterStatusReg3            =  0x00BDF04C,
 	HWPfFecDlClusterStatusReg4            =  0x00BDF050,
 	HWPfFecDlClusterStatusReg5            =  0x00BDF054,
+	HwPfWbbThreshold                      =  0x00C20000,
+	HwPfWbbSpare                          =  0x00C20004,
+	HwPfWbbDebugCtl                       =  0x00C20010,
+	HwPfWbbDebug                          =  0x00C20014,
+	HwPfWbbError                          =  0x00C20020,
+	HwPfWbbErrorInjecti                   =  0x00C20024,
 	HWPfChaFabPllPllrst                   =  0x00C40000,
 	HWPfChaFabPllClk0                     =  0x00C40004,
 	HWPfChaFabPllClk1                     =  0x00C40008,
@@ -527,6 +553,10 @@  enum {
 	HWPfHiDebugMemSnoopMsiFifo            =  0x00C841F8,
 	HWPfHiDebugMemSnoopInputFifo          =  0x00C841FC,
 	HWPfHiMsixMappingConfig               =  0x00C84200,
+	HWPfHiErrInjectReg                    =  0x00C84204,
+	HWPfHiErrStatusReg                    =  0x00C84208,
+	HWPfHiErrMaskReg                      =  0x00C8420C,
+	HWPfHiErrFatalReg                     =  0x00C84210,
 	HWPfHiJunkReg                         =  0x00C8FF00,
 	HWPfDdrUmmcVer                        =  0x00D00000,
 	HWPfDdrUmmcCap                        =  0x00D00010,
@@ -545,6 +575,7 @@  enum {
 	HWPfDdrMpcPbw2                        =  0x00D00130,
 	HWPfDdrMpcPbw1                        =  0x00D00140,
 	HWPfDdrMpcPbw0                        =  0x00D00150,
+	HwPfDdrUmmcEccErrInj                  =  0x00D00190,
 	HWPfDdrMemoryInit                     =  0x00D00200,
 	HWPfDdrMemoryInitDone                 =  0x00D00210,
 	HWPfDdrMemInitPhyTrng0                =  0x00D00240,
@@ -876,6 +907,7 @@  enum {
 	HwPfPcieSupFence                      =  0x00D8086C,
 	HwPfPcieSupMtcs                       =  0x00D80870,
 	HwPfPcieSupStatsum                    =  0x00D809B8,
+	HwPfPcieRomVersion                    =  0x00D80B0C,
 	HwPfPciePcsDpStatus0                  =  0x00D81000,
 	HwPfPciePcsDpControl0                 =  0x00D81004,
 	HwPfPciePcsPmaStatusLane0             =  0x00D81008,
@@ -1081,6 +1113,16 @@  enum {
 	ACC100_PF_INT_QMGR_ERR = 13,
 	ACC100_PF_INT_INT_REQ_OVERFLOW = 14,
 	ACC100_PF_INT_APB_TIMEOUT = 15,
+	ACC100_PF_INT_CORE_HANG = 16,
+	ACC100_PF_INT_CLUSTER_HANG = 17,
+	ACC100_PF_INT_WBB_ERROR = 18,
+	ACC100_PF_INT_5G_EXTRAREAD = 24,
+	ACC100_PF_INT_5G_READ_TIMEOUT = 25,
+	ACC100_PF_INT_5G_ERROR = 26,
+	ACC100_PF_INT_PCIE_ERROR = 27,
+	ACC100_PF_INT_DDR_ERROR = 28,
+	ACC100_PF_INT_MISC_ERROR = 29,
+	ACC100_PF_INT_I2C = 30,
 };
 
 #endif /* ACC100_PF_ENUM_H */
diff --git a/drivers/baseband/acc100/acc100_pmd.h b/drivers/baseband/acc100/acc100_pmd.h
index 20157e5886..27801767b7 100644
--- a/drivers/baseband/acc100/acc100_pmd.h
+++ b/drivers/baseband/acc100/acc100_pmd.h
@@ -215,7 +215,8 @@  union acc100_dma_rsp_desc {
 			timestampEn:1,
 			iterCountFrac:8,
 			iter_cnt:8,
-			rsrvd3:6,
+			harq_failure:1,
+			rsrvd3:5,
 			sdone:1,
 			fdone:1;
 		uint32_t add_info_0;
@@ -508,6 +509,8 @@  struct acc100_registry_addr {
 	unsigned int depth_log1_offset;
 	unsigned int qman_group_func;
 	unsigned int ddr_range;
+	unsigned int pmon_ctrl_a;
+	unsigned int pmon_ctrl_b;
 };
 
 /* Structure holding registry addresses for PF */
@@ -537,6 +540,8 @@  static const struct acc100_registry_addr pf_reg_addr = {
 	.depth_log1_offset = HWPfQmgrGrpDepthLog21Vf,
 	.qman_group_func = HWPfQmgrGrpFunction0,
 	.ddr_range = HWPfDmaVfDdrBaseRw,
+	.pmon_ctrl_a = HWPfPermonACntrlRegVf,
+	.pmon_ctrl_b = HWPfPermonBCntrlRegVf,
 };
 
 /* Structure holding registry addresses for VF */
@@ -566,6 +571,8 @@  static const struct acc100_registry_addr vf_reg_addr = {
 	.depth_log1_offset = HWVfQmgrGrpDepthLog21Vf,
 	.qman_group_func = HWVfQmgrGrpFunction0Vf,
 	.ddr_range = HWVfDmaDdrBaseRangeRoVf,
+	.pmon_ctrl_a = HWVfPmACntrlRegVf,
+	.pmon_ctrl_b = HWVfPmBCntrlRegVf,
 };
 
 /* Structure associated with each queue. */
diff --git a/drivers/baseband/acc100/acc100_vf_enum.h b/drivers/baseband/acc100/acc100_vf_enum.h
index b512af33fc..5807a9d0fd 100644
--- a/drivers/baseband/acc100/acc100_vf_enum.h
+++ b/drivers/baseband/acc100/acc100_vf_enum.h
@@ -70,4 +70,10 @@  enum {
 	ACC100_VF_INT_QMGR_AQ_OVERTHRESHOLD = 9,
 };
 
+/* TIP PF2VF Comms */
+enum {
+	ACC100_VF2PF_STATUS_REQUEST = 0,
+	ACC100_VF2PF_USING_VF = 1,
+};
+
 #endif /* ACC100_VF_ENUM_H */
diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index ea54152856..9c15797503 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -292,6 +292,13 @@  fetch_acc100_config(struct rte_bbdev *dev)
 			acc100_conf->q_dl_5g.aq_depth_log2);
 }
 
+static inline void
+acc100_vf2pf(struct acc100_device *d, unsigned int payload)
+{
+	if (d->device_variant == ACC101_VARIANT)
+		acc100_reg_write(d, HWVfHiVfToPfDbellVf, payload);
+}
+
 static void
 free_base_addresses(void **base_addrs, int size)
 {
@@ -646,6 +653,11 @@  acc100_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
 	/* Read the populated cfg from ACC100 registers */
 	fetch_acc100_config(dev);
 
+	for (value = 0; value <= 2; value++) {
+		acc100_reg_write(d, reg_addr->pmon_ctrl_a, value);
+		acc100_reg_write(d, reg_addr->pmon_ctrl_b, value);
+	}
+
 	/* Release AXI from PF */
 	if (d->pf_device)
 		acc100_reg_write(d, HWPfDmaAxiControl, 1);
@@ -712,6 +724,7 @@  acc100_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
 
 	/* Mark as configured properly */
 	d->configured = true;
+	acc100_vf2pf(d, ACC100_VF2PF_USING_VF);
 
 	rte_bbdev_log_debug(
 			"ACC100 (%s) configured  sw_rings = %p, sw_rings_iova = %#"