From patchwork Wed Aug 3 11:30:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Junfeng Guo X-Patchwork-Id: 114571 X-Patchwork-Delegate: andrew.rybchenko@oktetlabs.ru Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 006AEA00C5; Wed, 3 Aug 2022 13:32:02 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id AB24842BB9; Wed, 3 Aug 2022 13:31:30 +0200 (CEST) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mails.dpdk.org (Postfix) with ESMTP id 2D19B42BA5 for ; Wed, 3 Aug 2022 13:31:28 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1659526288; x=1691062288; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=gOGN7x0PvmRdNliLtjp71FVJoInJYB9j/1AQYX/0Lxg=; b=Zbv/TEtcJJN96bc2CWExwOHMRNqi82uRFgrCuIm1HNkCPC9rbAxn9Kx8 8eEy0ZSQ0bNVezTkfOP9Ss8A07MBzAkfbuDb4N0/lPM5rT+0KiujU819r MctxcqX67C4mDd8PIFNM1Yj0DRc8FZsZfyeUomlvK7nCDhI7T33237oii Mgr4Oaash6dQO4IXIYVlbfa2CJX2QitYtiu1KwbpcvMV7JR5uH1n1JksH QXBYPMLzGynuEQ3Zn+RzmPEVhi03iroJfsI7+A5FkLzFxHnP5xN+iWz+/ kNhJ7hAMzCFAx+aHbjlxK8p0upHIk2Ea+mbKuUMX8q1VByWRjrWaW47Pe Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10427"; a="375948513" X-IronPort-AV: E=Sophos;i="5.93,214,1654585200"; d="scan'208";a="375948513" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Aug 2022 04:31:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,214,1654585200"; d="scan'208";a="692211064" Received: from dpdk-jf-ntb-v2.sh.intel.com ([10.67.118.246]) by FMSMGA003.fm.intel.com with ESMTP; 03 Aug 2022 04:31:26 -0700 From: Junfeng Guo To: qi.z.zhang@intel.com, jingjing.wu@intel.com, beilei.xing@intel.com Cc: dev@dpdk.org, junfeng.guo@intel.com Subject: [PATCH 05/13] net/idpf: add support to get device information Date: Wed, 3 Aug 2022 19:30:56 +0800 Message-Id: <20220803113104.1184059-6-junfeng.guo@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220803113104.1184059-1-junfeng.guo@intel.com> References: <20220803113104.1184059-1-junfeng.guo@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add dev ops dev_infos_get. Signed-off-by: Beilei Xing Signed-off-by: Junfeng Guo --- drivers/net/idpf/idpf_ethdev.c | 71 ++++++++++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) diff --git a/drivers/net/idpf/idpf_ethdev.c b/drivers/net/idpf/idpf_ethdev.c index b302e42a9c..ab991f9181 100644 --- a/drivers/net/idpf/idpf_ethdev.c +++ b/drivers/net/idpf/idpf_ethdev.c @@ -28,6 +28,8 @@ static int idpf_dev_configure(struct rte_eth_dev *dev); static int idpf_dev_start(struct rte_eth_dev *dev); static int idpf_dev_stop(struct rte_eth_dev *dev); static int idpf_dev_close(struct rte_eth_dev *dev); +static int idpf_dev_info_get(struct rte_eth_dev *dev, + struct rte_eth_dev_info *dev_info); static const struct eth_dev_ops idpf_eth_dev_ops = { .dev_configure = idpf_dev_configure, @@ -42,8 +44,77 @@ static const struct eth_dev_ops idpf_eth_dev_ops = { .rx_queue_release = idpf_dev_rx_queue_release, .tx_queue_setup = idpf_tx_queue_setup, .tx_queue_release = idpf_dev_tx_queue_release, + .dev_infos_get = idpf_dev_info_get, }; +static int +idpf_dev_info_get(__rte_unused struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) +{ + dev_info->max_rx_queues = adapter->caps->max_rx_q; + dev_info->max_tx_queues = adapter->caps->max_tx_q; + dev_info->min_rx_bufsize = IDPF_MIN_BUF_SIZE; + dev_info->max_rx_pktlen = IDPF_MAX_FRAME_SIZE; + + dev_info->max_mtu = dev_info->max_rx_pktlen - IDPF_ETH_OVERHEAD; + dev_info->min_mtu = RTE_ETHER_MIN_MTU; + + dev_info->max_mac_addrs = IDPF_NUM_MACADDR_MAX; + dev_info->dev_capa = RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP | + RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP; + dev_info->rx_offload_capa = + RTE_ETH_RX_OFFLOAD_VLAN_STRIP | + RTE_ETH_RX_OFFLOAD_QINQ_STRIP | + RTE_ETH_RX_OFFLOAD_IPV4_CKSUM | + RTE_ETH_RX_OFFLOAD_UDP_CKSUM | + RTE_ETH_RX_OFFLOAD_TCP_CKSUM | + RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM | + RTE_ETH_RX_OFFLOAD_SCATTER | + RTE_ETH_RX_OFFLOAD_VLAN_FILTER | + RTE_ETH_RX_OFFLOAD_RSS_HASH; + + dev_info->tx_offload_capa = + RTE_ETH_TX_OFFLOAD_VLAN_INSERT | + RTE_ETH_TX_OFFLOAD_QINQ_INSERT | + RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | + RTE_ETH_TX_OFFLOAD_UDP_CKSUM | + RTE_ETH_TX_OFFLOAD_TCP_CKSUM | + RTE_ETH_TX_OFFLOAD_SCTP_CKSUM | + RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM | + RTE_ETH_TX_OFFLOAD_TCP_TSO | + RTE_ETH_TX_OFFLOAD_VXLAN_TNL_TSO | + RTE_ETH_TX_OFFLOAD_GRE_TNL_TSO | + RTE_ETH_TX_OFFLOAD_IPIP_TNL_TSO | + RTE_ETH_TX_OFFLOAD_GENEVE_TNL_TSO | + RTE_ETH_TX_OFFLOAD_MULTI_SEGS | + RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE; + + dev_info->default_rxconf = (struct rte_eth_rxconf) { + .rx_free_thresh = IDPF_DEFAULT_RX_FREE_THRESH, + .rx_drop_en = 0, + .offloads = 0, + }; + + dev_info->default_txconf = (struct rte_eth_txconf) { + .tx_free_thresh = IDPF_DEFAULT_TX_FREE_THRESH, + .tx_rs_thresh = IDPF_DEFAULT_TX_RS_THRESH, + .offloads = 0, + }; + + dev_info->rx_desc_lim = (struct rte_eth_desc_lim) { + .nb_max = IDPF_MAX_RING_DESC, + .nb_min = IDPF_MIN_RING_DESC, + .nb_align = IDPF_ALIGN_RING_DESC, + }; + + dev_info->tx_desc_lim = (struct rte_eth_desc_lim) { + .nb_max = IDPF_MAX_RING_DESC, + .nb_min = IDPF_MIN_RING_DESC, + .nb_align = IDPF_ALIGN_RING_DESC, + }; + + return 0; +} + static int idpf_init_vport_req_info(__rte_unused struct rte_eth_dev *dev) {