From patchwork Mon Jul 11 13:18:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Van Haaren, Harry" X-Patchwork-Id: 113901 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 527F9A0032; Mon, 11 Jul 2022 15:18:41 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A699B4280D; Mon, 11 Jul 2022 15:18:40 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mails.dpdk.org (Postfix) with ESMTP id 6891541614 for ; Mon, 11 Jul 2022 15:18:37 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1657545517; x=1689081517; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=S1oRdNn8qoOHe+VI4mW6ATcl9w2lcuWeHPT1Vm9JdgU=; b=BNOEkKeFksZAnvbnxSpnoGZVCmQW6i0QEx4xPLkcixjjnEhiox/Gbh4m BYNeMYt+SZwqfy58YhzxbX8xWoZcKnCRP6qQMCkahK4fgJchfYHtl6hLT /ayF67d7YssOtfD21jnek3xsf73KuDern+PX5R3Z6fQhIdGVqggdE280u tie45TzmN0Pv/HcJrjIrtOnTQtvq3fteCzEXGHevm0TE/Fx+rCCzMbXwy Q3hchFwXBqMjwNiYTvmc98OEK3egoF30CpkRW4S8lKh4mPzYkpW3aG6CU 3HpUPdWFk8ppxLDtlaTPZkfACHl4c9pV2MPLpC05CEY0jj5qDg7sqyfMF Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10404"; a="267697822" X-IronPort-AV: E=Sophos;i="5.92,262,1650956400"; d="scan'208";a="267697822" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jul 2022 06:18:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,262,1650956400"; d="scan'208";a="921778882" Received: from silpixa00401454.ir.intel.com ([10.55.128.122]) by fmsmga005.fm.intel.com with ESMTP; 11 Jul 2022 06:18:35 -0700 From: Harry van Haaren To: dev@dpdk.org Cc: Harry van Haaren , =?utf-8?q?Mattias_R=C3=B6?= =?utf-8?q?nnblom?= , Honnappa Nagarahalli , =?utf-8?q?Morten_Br?= =?utf-8?q?=C3=B8rup?= , Bruce Richardson Subject: [PATCH v3 2/2] service: fix potential stats race-condition on MT services Date: Mon, 11 Jul 2022 13:18:25 +0000 Message-Id: <20220711131825.3373195-2-harry.van.haaren@intel.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220711131825.3373195-1-harry.van.haaren@intel.com> References: <20220711105747.3295201-1-harry.van.haaren@intel.com> <20220711131825.3373195-1-harry.van.haaren@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This commit fixes a potential racey-add that could occur if multiple service-lcores were executing the same MT-safe service at the same time, with service statistics collection enabled. Because multiple threads can run and execute the service, the stats values can have multiple writer threads, resulting in the requirement of using atomic addition for correctness. Note that when a MT unsafe service is executed, a spinlock is held, so the stats increments are protected. This fact is used to avoid executing atomic add instructions when not required. Regular reads and increments are used, and only the store is specified as atomic, reducing perf impact on e.g. x86 arch. This patch causes a 1.25x increase in cycle-cost for polling a MT safe service when statistics are enabled. No change was seen for MT unsafe services, or when statistics are disabled. Reported-by: Mattias Rönnblom Suggested-by: Honnappa Nagarahalli Suggested-by: Morten Brørup Suggested-by: Bruce Richardson Signed-off-by: Harry van Haaren --- v3: - Fix 32-bit build, by forcing natural alignment of uint64_t in the struct that contains it, using __rte_aligned(8) macro. - Note: I'm seeing a checkpatch "avoid externs in .c files" warning, but it doesn't make sense to me, so perhaps its a false-positive..? v2 (Thanks Honnappa, Morten, Bruce & Mattias for discussion): - Improved handling of stat stores to ensure they're atomic by using __atomic_store_n() with regular loads/increments. - Added BUILD_BUG_ON alignment checks for the uint64_t stats variables, tested with __rte_packed to ensure build breaks. --- lib/eal/common/rte_service.c | 31 +++++++++++++++++++++++++++---- 1 file changed, 27 insertions(+), 4 deletions(-) diff --git a/lib/eal/common/rte_service.c b/lib/eal/common/rte_service.c index d2b7275ac0..94cb056196 100644 --- a/lib/eal/common/rte_service.c +++ b/lib/eal/common/rte_service.c @@ -50,10 +50,17 @@ struct rte_service_spec_impl { * on currently. */ uint32_t num_mapped_cores; - uint64_t calls; - uint64_t cycles_spent; + + /* 32-bit builds won't naturally align a uint64_t, so force alignment, + * allowing regular reads to be atomic. + */ + uint64_t calls __rte_aligned(8); + uint64_t cycles_spent __rte_aligned(8); } __rte_cache_aligned; +/* Mask used to ensure uint64_t 8 byte vars are naturally aligned. */ +#define RTE_SERVICE_STAT_ALIGN_MASK (8 - 1) + /* the internal values of a service core */ struct core_state { /* map of services IDs are run on this core */ @@ -359,13 +366,29 @@ service_runner_do_callback(struct rte_service_spec_impl *s, { void *userdata = s->spec.callback_userdata; + /* Ensure the atomically stored variables are naturally aligned, + * as required for regular loads to be atomic. + */ + RTE_BUILD_BUG_ON((offsetof(struct rte_service_spec_impl, calls) + & RTE_SERVICE_STAT_ALIGN_MASK) != 0); + RTE_BUILD_BUG_ON((offsetof(struct rte_service_spec_impl, cycles_spent) + & RTE_SERVICE_STAT_ALIGN_MASK) != 0); + if (service_stats_enabled(s)) { uint64_t start = rte_rdtsc(); s->spec.callback(userdata); uint64_t end = rte_rdtsc(); - s->cycles_spent += end - start; + uint64_t cycles = end - start; cs->calls_per_service[service_idx]++; - s->calls++; + if (service_mt_safe(s)) { + __atomic_fetch_add(&s->cycles_spent, cycles, __ATOMIC_RELAXED); + __atomic_fetch_add(&s->calls, 1, __ATOMIC_RELAXED); + } else { + uint64_t cycles_new = s->cycles_spent + cycles; + uint64_t calls_new = s->calls++; + __atomic_store_n(&s->cycles_spent, cycles_new, __ATOMIC_RELAXED); + __atomic_store_n(&s->calls, calls_new, __ATOMIC_RELAXED); + } } else s->spec.callback(userdata); }