common/cnxk: allow changing PTP mode on 10k platforms

Message ID 20220701115448.2222697-1-tduszynski@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: Thomas Monjalon
Headers
Series common/cnxk: allow changing PTP mode on 10k platforms |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/github-robot: build success github build: passed
ci/iol-x86_64-compile-testing success Testing PASS
ci/iol-aarch64-unit-testing success Testing PASS
ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-abi-testing success Testing PASS

Commit Message

Tomasz Duszynski July 1, 2022, 11:54 a.m. UTC
  Since firmware has added support for toggling PTP mode on 10k platforms
userspace code should allow doing that as well.

Cc: stable@dpdk.org

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob Kollanukkaran <jerinj@marvell.com>
---
 drivers/common/cnxk/roc_bphy_cgx.c | 3 ---
 1 file changed, 3 deletions(-)

--
2.25.1
  

Comments

Thomas Monjalon July 5, 2022, 4:50 p.m. UTC | #1
01/07/2022 13:54, Tomasz Duszynski:
> Since firmware has added support for toggling PTP mode on 10k platforms
> userspace code should allow doing that as well.
> 
> Cc: stable@dpdk.org
> 
> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
> Reviewed-by: Jerin Jacob Kollanukkaran <jerinj@marvell.com>

Applied, thanks.
  

Patch

diff --git a/drivers/common/cnxk/roc_bphy_cgx.c b/drivers/common/cnxk/roc_bphy_cgx.c
index a5df104088..e966494e21 100644
--- a/drivers/common/cnxk/roc_bphy_cgx.c
+++ b/drivers/common/cnxk/roc_bphy_cgx.c
@@ -285,9 +285,6 @@  roc_bphy_cgx_ptp_rx_ena_dis(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
 {
 	uint64_t scr1, scr0;

-	if (roc_model_is_cn10k())
-		return -ENOTSUP;
-
 	if (!roc_cgx)
 		return -EINVAL;