[v2] config/arm: add PHYTIUM ft2000plus

Message ID 20220621062437.525-1-luzhipeng@cestc.cn (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers
Series [v2] config/arm: add PHYTIUM ft2000plus |

Checks

Context Check Description
ci/checkpatch warning coding style issues
ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-aarch64-unit-testing success Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
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ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/iol-abi-testing success Testing PASS

Commit Message

luzhipeng June 21, 2022, 6:24 a.m. UTC
  Here adds configs for PHYTIUM server.

Signed-off-by: luzhipeng <luzhipeng@cestc.cn>
---
 config/arm/arm64_ft2000plus_linux_gcc | 16 ++++++++++++++++
 config/arm/meson.build                | 26 +++++++++++++++++++++++++-
 2 files changed, 41 insertions(+), 1 deletion(-)
 create mode 100644 config/arm/arm64_ft2000plus_linux_gcc
 
 v2: add ccache support
  

Patch

diff --git a/config/arm/arm64_ft2000plus_linux_gcc b/config/arm/arm64_ft2000plus_linux_gcc
new file mode 100644
index 0000000000..f02b492ba2
--- /dev/null
+++ b/config/arm/arm64_ft2000plus_linux_gcc
@@ -0,0 +1,16 @@ 
+[binaries]
+c = [ 'ccache', 'aarch64-linux-gnu-gcc']
+cpp = [ 'ccache', 'aarch64-linux-gnu-cpp']
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+platform = 'ft2000plus'
diff --git a/config/arm/meson.build b/config/arm/meson.build
index aa12eb76f4..48e5f6af5b 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -218,6 +218,20 @@  implementer_qualcomm = {
     }
 }
 
+implementer_phytium = {
+    'description': 'PHYTIUM',
+    'flags': [
+        ['RTE_MACHINE', '"armv8a"'],
+        ['RTE_USE_C11_MEM_MODEL', true],
+        ['RTE_CACHE_LINE_SIZE', 64],
+        ['RTE_MAX_LCORE', 64],
+        ['RTE_MAX_NUMA_NODES', 8]
+    ],
+    'part_number_config': {
+        '0x662': {'machine_args':  ['-march=armv8-a+crc']}
+    }
+}
+
 ## Arm implementers (ID from MIDR in Arm Architecture Reference Manual)
 implementers = {
     'generic': implementer_generic,
@@ -225,7 +239,8 @@  implementers = {
     '0x43': implementer_cavium,
     '0x48': implementer_hisilicon,
     '0x50': implementer_ampere,
-    '0x51': implementer_qualcomm
+    '0x51': implementer_qualcomm,
+    '0x70': implementer_phytium
 }
 
 # SoC specific armv8 flags have the highest priority
@@ -378,6 +393,13 @@  soc_thunderxt83 = {
     'part_number': '0xa3'
 }
 
+soc_ft2000plus = {
+    'description': 'PHYTIUM ft2000plus',
+    'implementer': '0x70',
+    'part_number': '0x662',
+    'numa': true
+}
+
 '''
 Start of SoCs list
 generic:         Generic un-optimized build for armv8 aarch64 execution mode.
@@ -398,6 +420,7 @@  stingray:        Broadcom Stingray
 thunderx2:       Marvell ThunderX2 T99
 thunderxt88:     Marvell ThunderX T88
 thunderxt83:     Marvell ThunderX T83
+ft2000plus:  PHYTIUM ft2000plus
 End of SoCs list
 '''
 # The string above is included in the documentation, keep it in sync with the
@@ -421,6 +444,7 @@  socs = {
     'thunderx2': soc_thunderx2,
     'thunderxt88': soc_thunderxt88,
     'thunderxt83': soc_thunderxt83,
+    'ft2000plus': soc_ft2000plus,
 }
 
 dpdk_conf.set('RTE_ARCH_ARM', 1)