From patchwork Fri Jun 17 06:14:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ankur Dwivedi X-Patchwork-Id: 112955 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id EA5AFA0093; Fri, 17 Jun 2022 08:15:33 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D0A1E40689; Fri, 17 Jun 2022 08:15:33 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id D710B40689; Fri, 17 Jun 2022 08:15:31 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 25H3v4RL006661; Thu, 16 Jun 2022 23:15:30 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type : content-transfer-encoding; s=pfpt0220; bh=QwusSwzKdEQZIuECjNt2zS+GvCyJibuXl2n37sd3+eg=; b=PXiPsJlu1bBbqg63Kiyl2jWITqwWxSxGHDA2PTtSuCnVMYSSw75te45cuduT3Vlk+tOO kCbgL22EDLzzScHMgSznHwTdh0mQCL5sgjcP4Uwqqb8SDo1euF0gAeMjaHgEa+Ywj+UY OYDV0Gcn0yDEdyhKTs9DRUCBgiPGd7cRiBbsMBiK/gL4NTCMn0vEpaUblJ1JqVvh5JUX fS7O2mW/JAR0Z+5QJLqsmhJfecdkQ5hHGQiEO6TaSiuxH/bMh1GLsfWsC3KoP3OfQ581 glKpf5SyMlq1RsbtP/Z9X57771q935ooT//Z4cdtlwjbRliPJ3E5SHKIgroKgmtxWHDo yw== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3grj5h8erf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 16 Jun 2022 23:15:30 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 16 Jun 2022 23:15:29 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 16 Jun 2022 23:15:28 -0700 Received: from hyd1349.t110.caveonetworks.com.com (unknown [10.29.45.13]) by maili.marvell.com (Postfix) with ESMTP id 9D8AE3F7086; Thu, 16 Jun 2022 23:15:26 -0700 (PDT) From: Ankur Dwivedi To: CC: , , , , , Ankur Dwivedi , Subject: [PATCH 1/2] common/cpt: fix compilation with GCC 12 Date: Fri, 17 Jun 2022 11:44:31 +0530 Message-ID: <20220617061432.2685-2-adwivedi@marvell.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20220617061432.2685-1-adwivedi@marvell.com> References: <20220617061432.2685-1-adwivedi@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: 4GTv7u-cFCwh8zXYh6kp3h9A--TVIT_O X-Proofpoint-ORIG-GUID: 4GTv7u-cFCwh8zXYh6kp3h9A--TVIT_O X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.64.514 definitions=2022-06-17_04,2022-06-16_01,2022-02-23_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The following warning is observed with GCC 12 compilation: In function ‘fill_sg_comp_from_iov’, inlined from ‘cpt_zuc_snow3g_enc_prep’ at ../drivers/common/cpt/cpt_ucode.h:1672:9, inlined from ‘cpt_fc_enc_hmac_prep’ at ../drivers/common/cpt/cpt_ucode.h:2472:3, inlined from ‘fill_digest_params’ at ../drivers/common/cpt/cpt_ucode.h:3548:14, inlined from ‘otx_cpt_enq_single_sym’ at ../drivers/crypto/octeontx/otx_cryptodev_ops.c:541:9, inlined from ‘otx_cpt_enq_single_sym_sessless’ at ../drivers/crypto/octeontx/otx_cryptodev_ops.c:584:8, inlined from ‘otx_cpt_enq_single’ at ../drivers/crypto/octeontx/otx_cryptodev_ops.c:611:11, inlined from ‘otx_cpt_pkt_enqueue’ at ../drivers/crypto/octeontx/otx_cryptodev_ops.c:643:9, inlined from ‘otx_cpt_enqueue_sym’ at ../drivers/crypto/octeontx/otx_cryptodev_ops.c:668:9: ../drivers/common/cpt/cpt_ucode.h:415:36: warning: array subscript 0 is outside array bounds of ‘buf_ptr_t[0]’ {aka ‘struct buf_ptr[]’} [-Warray-bounds] 415 | e_dma_addr = bufs[j].dma_addr; | ~~~~~~~~~~~^~~~~~~~~~~~~~~~~~ ../drivers/common/cpt/cpt_ucode.h:416:48: warning: array subscript 0 is outside array bounds of ‘buf_ptr_t[0]’ {aka ‘struct buf_ptr[]’} [-Warray-bounds] 416 | e_len = (size > bufs[j].size) ? | ~~~~~~~^~~~~ This patch resolves the warning. Fixes: 9be415daf469 ("common/cpt: add common defines for microcode") Fixes: b74652f3a91f ("common/cpt: add microcode interface for encryption") Cc: stable@dpdk.org Signed-off-by: Ankur Dwivedi Reviewed-by: Anoob Joseph Reviewed-by: Jerin Jacob Kollanukkaran --- drivers/common/cpt/cpt_mcode_defines.h | 2 +- drivers/common/cpt/cpt_ucode.h | 21 ++++++++++----------- 2 files changed, 11 insertions(+), 12 deletions(-) diff --git a/drivers/common/cpt/cpt_mcode_defines.h b/drivers/common/cpt/cpt_mcode_defines.h index f16ee44297..e6dcb7674c 100644 --- a/drivers/common/cpt/cpt_mcode_defines.h +++ b/drivers/common/cpt/cpt_mcode_defines.h @@ -387,7 +387,7 @@ typedef struct buf_ptr { /* IOV Pointer */ typedef struct{ int buf_cnt; - buf_ptr_t bufs[0]; + buf_ptr_t bufs[]; } iov_ptr_t; typedef struct fc_params { diff --git a/drivers/common/cpt/cpt_ucode.h b/drivers/common/cpt/cpt_ucode.h index e1f2f6005d..22aabab6ac 100644 --- a/drivers/common/cpt/cpt_ucode.h +++ b/drivers/common/cpt/cpt_ucode.h @@ -394,27 +394,26 @@ fill_sg_comp_from_iov(sg_comp_t *list, int32_t j; uint32_t extra_len = extra_buf ? extra_buf->size : 0; uint32_t size = *psize; - buf_ptr_t *bufs; - bufs = from->bufs; for (j = 0; (j < from->buf_cnt) && size; j++) { + phys_addr_t dma_addr = from->bufs[j].dma_addr; + uint32_t buf_sz = from->bufs[j].size; + sg_comp_t *to = &list[i >> 2]; phys_addr_t e_dma_addr; uint32_t e_len; - sg_comp_t *to = &list[i >> 2]; if (unlikely(from_offset)) { - if (from_offset >= bufs[j].size) { - from_offset -= bufs[j].size; + if (from_offset >= buf_sz) { + from_offset -= buf_sz; continue; } - e_dma_addr = bufs[j].dma_addr + from_offset; - e_len = (size > (bufs[j].size - from_offset)) ? - (bufs[j].size - from_offset) : size; + e_dma_addr = dma_addr + from_offset; + e_len = (size > (buf_sz - from_offset)) ? + (buf_sz - from_offset) : size; from_offset = 0; } else { - e_dma_addr = bufs[j].dma_addr; - e_len = (size > bufs[j].size) ? - bufs[j].size : size; + e_dma_addr = dma_addr; + e_len = (size > buf_sz) ? buf_sz : size; } to->u.s.len[i % 4] = rte_cpu_to_be_16(e_len);