[4/4] dma/hisilicon: support vchan-status ops

Message ID 20220527034055.33271-5-fengchengwen@huawei.com (mailing list archive)
State Accepted, archived
Delegated to: Thomas Monjalon
Headers
Series bugfix and feature for Hisilicon DMA PMD |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/iol-mellanox-Performance success Performance Testing PASS
ci/intel-Testing success Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/github-robot: build success github build: passed
ci/iol-aarch64-unit-testing success Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS
ci/iol-abi-testing success Testing PASS

Commit Message

Chengwen Feng May 27, 2022, 3:40 a.m. UTC
  This patch adds support for vchan-status ops.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
---
 drivers/dma/hisilicon/hisi_dmadev.c | 30 +++++++++++++++++++++++++++++
 drivers/dma/hisilicon/hisi_dmadev.h |  7 ++++++-
 2 files changed, 36 insertions(+), 1 deletion(-)
  

Patch

diff --git a/drivers/dma/hisilicon/hisi_dmadev.c b/drivers/dma/hisilicon/hisi_dmadev.c
index fbe09284ed..9494b60779 100644
--- a/drivers/dma/hisilicon/hisi_dmadev.c
+++ b/drivers/dma/hisilicon/hisi_dmadev.c
@@ -461,6 +461,27 @@  hisi_dma_stats_reset(struct rte_dma_dev *dev, uint16_t vchan)
 	return 0;
 }
 
+static int
+hisi_dma_vchan_status(const struct rte_dma_dev *dev, uint16_t vchan,
+		      enum rte_dma_vchan_status *status)
+{
+	struct hisi_dma_dev *hw = dev->data->dev_private;
+	uint32_t val;
+
+	RTE_SET_USED(vchan);
+
+	val = hisi_dma_read_queue(hw, HISI_DMA_QUEUE_FSM_REG);
+	val = FIELD_GET(HISI_DMA_QUEUE_FSM_STS_M, val);
+	if (val == HISI_DMA_STATE_RUN)
+		*status = RTE_DMA_VCHAN_ACTIVE;
+	else if (val == HISI_DMA_STATE_CPL)
+		*status = RTE_DMA_VCHAN_IDLE;
+	else
+		*status = RTE_DMA_VCHAN_HALTED_ERROR;
+
+	return 0;
+}
+
 static void
 hisi_dma_dump_range(struct hisi_dma_dev *hw, FILE *f, uint32_t start,
 		    uint32_t end)
@@ -816,6 +837,14 @@  hisi_dma_gen_dev_name(const struct rte_pci_device *pci_dev,
  *                           dev_stop|          |
  *                                   |          v
  *                                ------------------
+ *                                |      CPL       |
+ *                                ------------------
+ *                                   ^          |
+ *                      hardware     |          |
+ *                      completed all|          |dev_submit
+ *                      descriptors  |          |
+ *                                   |          |
+ *                                ------------------
  *                                |      RUN       |
  *                                ------------------
  *
@@ -829,6 +858,7 @@  static const struct rte_dma_dev_ops hisi_dmadev_ops = {
 	.vchan_setup      = hisi_dma_vchan_setup,
 	.stats_get        = hisi_dma_stats_get,
 	.stats_reset      = hisi_dma_stats_reset,
+	.vchan_status     = hisi_dma_vchan_status,
 	.dev_dump         = hisi_dma_dump,
 };
 
diff --git a/drivers/dma/hisilicon/hisi_dmadev.h b/drivers/dma/hisilicon/hisi_dmadev.h
index 90b85322ca..deb1357eea 100644
--- a/drivers/dma/hisilicon/hisi_dmadev.h
+++ b/drivers/dma/hisilicon/hisi_dmadev.h
@@ -132,11 +132,16 @@  enum {
 
 /**
  * In fact, there are multiple states, but it need to pay attention to
- * the following two states for the driver:
+ * the following three states for the driver:
  */
 enum {
 	HISI_DMA_STATE_IDLE = 0,
 	HISI_DMA_STATE_RUN,
+	/**
+	 * All of the submitted descriptor are finished, and the queue
+	 * is waiting for new descriptors.
+	 */
+	HISI_DMA_STATE_CPL,
 };
 
 /**