From patchwork Sun May 8 06:26:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 110866 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6890DA0503; Sun, 8 May 2022 08:29:07 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 7991242888; Sun, 8 May 2022 08:27:33 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 78EB342865 for ; Sun, 8 May 2022 08:27:32 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 2485sN1a013250 for ; Sat, 7 May 2022 23:27:31 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=OG/9h0tWaub/ra4cF+qLSmeoeqFrGCaOmHmGKjsI95E=; b=JPGmpt0b+MCG2cUBl+1MjQDhzXxc5oUfNhBSoo4m94Lyav76qmOI6JRxCAkv9XfojA4n FuVphe9QwOlghxgbOXDn24wwEjCU+TXVfnfSrS2C6DruYmw8R5Y++VubS18biyavRvKu 3wAiT+tOFdSnwJRqJD9l1V3emRqdLpGTTAN65r//7XoGf+eRBE/jCA7hJlhpjWS+aOQo VLnY6p5+8w2kdCzFbi41He528RAXDq5O5jcKkEGg3aeGWLt1I0A5sDXNUIimRyRkQWtD ydfooIyYiVzpjNf1/FcbolEF4x8x+/dVix3HJz3ULeMjLNKCjKoyQ9Df/Ruv1Mk7sPut ig== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3fwp4psyqh-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Sat, 07 May 2022 23:27:31 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Sat, 7 May 2022 23:27:30 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 7 May 2022 23:27:30 -0700 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 29F363F7053; Sat, 7 May 2022 23:27:27 -0700 (PDT) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: Subject: [PATCH v4 25/28] net/cnxk: perform early MTU setup for eventmode Date: Sun, 8 May 2022 11:56:13 +0530 Message-ID: <20220508062616.3398-25-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20220508062616.3398-1-ndabilpuram@marvell.com> References: <20220419055921.10566-1-ndabilpuram@marvell.com> <20220508062616.3398-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: qNw6uL69hXbvDf_jYb40rrK65h93H9gb X-Proofpoint-GUID: qNw6uL69hXbvDf_jYb40rrK65h93H9gb X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-08_02,2022-05-06_01,2022-02-23_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Perform early MTU setup for event mode path in order to update the Rx/Tx offload flags before Rx adapter setup starts. Signed-off-by: Nithin Dabilpuram --- drivers/net/cnxk/cn10k_ethdev.c | 11 +++++++++++ drivers/net/cnxk/cn9k_ethdev.c | 11 +++++++++++ 2 files changed, 22 insertions(+) diff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c index de688f0..bc9e10f 100644 --- a/drivers/net/cnxk/cn10k_ethdev.c +++ b/drivers/net/cnxk/cn10k_ethdev.c @@ -248,6 +248,17 @@ cn10k_nix_rx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid, if (rc) return rc; + /* Do initial mtu setup for RQ0 before device start */ + if (!qid) { + rc = nix_recalc_mtu(eth_dev); + if (rc) + return rc; + + /* Update offload flags */ + dev->rx_offload_flags = nix_rx_offload_flags(eth_dev); + dev->tx_offload_flags = nix_tx_offload_flags(eth_dev); + } + rq = &dev->rqs[qid]; cq = &dev->cqs[qid]; diff --git a/drivers/net/cnxk/cn9k_ethdev.c b/drivers/net/cnxk/cn9k_ethdev.c index 18cc27e..de33fa7 100644 --- a/drivers/net/cnxk/cn9k_ethdev.c +++ b/drivers/net/cnxk/cn9k_ethdev.c @@ -241,6 +241,17 @@ cn9k_nix_rx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid, if (rc) return rc; + /* Do initial mtu setup for RQ0 before device start */ + if (!qid) { + rc = nix_recalc_mtu(eth_dev); + if (rc) + return rc; + + /* Update offload flags */ + dev->rx_offload_flags = nix_rx_offload_flags(eth_dev); + dev->tx_offload_flags = nix_tx_offload_flags(eth_dev); + } + rq = &dev->rqs[qid]; cq = &dev->cqs[qid];