diff mbox series

crypto/qat: enable asymmetric crypto on gen4 device

Message ID 20220407094714.19045-1-arkadiuszx.kusztal@intel.com (mailing list archive)
State Accepted, archived
Delegated to: akhil goyal
Headers
Series crypto/qat: enable asymmetric crypto on gen4 device |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/github-robot: build success github build: passed
ci/Intel-compilation success Compilation OK
ci/iol-aarch64-unit-testing success Testing PASS
ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-abi-testing success Testing PASS
ci/intel-Testing success Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-intel-Performance success Performance Testing PASS

Commit Message

Arkadiusz Kusztal April 7, 2022, 9:47 a.m. UTC 
  This commit enables asymmetric crypto in generation four
devices (4xxx).

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
---
 doc/guides/cryptodevs/qat.rst                |  1 +
 drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c | 12 ++++++++----
 2 files changed, 9 insertions(+), 4 deletions(-)

Comments

Ji, Kai May 10, 2022, 2:59 p.m. UTC | #1 
Acked-by: Ji, Kai <kai.ji@intel.com>

> -----Original Message-----
> From: Arek Kusztal <arkadiuszx.kusztal@intel.com>
> Sent: Thursday, April 7, 2022 10:47 AM
> To: dev@dpdk.org
> Cc: gakhil@marvell.com; Zhang, Roy Fan <roy.fan.zhang@intel.com>; Kusztal,
> ArkadiuszX <arkadiuszx.kusztal@intel.com>
> Subject: [PATCH] crypto/qat: enable asymmetric crypto on gen4 device
> 
> This commit enables asymmetric crypto in generation four devices (4xxx).
> 
> Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
> ---
> 2.30.2
Akhil Goyal May 26, 2022, 4:33 p.m. UTC | #2 
> Acked-by: Ji, Kai <kai.ji@intel.com>
Please be consistent in Acks
Corrected this to 
Acked-by: Kai Ji <kai.ji@intel.com>

> 
> > This commit enables asymmetric crypto in generation four devices (4xxx).
> >
> > Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>

Applied to dpdk-next-crypto
diff mbox series

Patch

diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index 785e041324..18ad1646a4 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -169,6 +169,7 @@  poll mode crypto driver support for the following hardware accelerator devices:
 * ``Intel QuickAssist Technology C3xxx``
 * ``Intel QuickAssist Technology D15xx``
 * ``Intel QuickAssist Technology C4xxx``
+* ``Intel QuickAssist Technology 4xxx``
 
 The QAT ASYM PMD has support for:
 
diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c b/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c
index 3d8b2e377c..a9457d9278 100644
--- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c
+++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c
@@ -375,8 +375,12 @@  RTE_INIT(qat_sym_crypto_gen4_init)
 
 RTE_INIT(qat_asym_crypto_gen4_init)
 {
-	qat_asym_gen_dev_ops[QAT_GEN4].cryptodev_ops = NULL;
-	qat_asym_gen_dev_ops[QAT_GEN4].get_capabilities = NULL;
-	qat_asym_gen_dev_ops[QAT_GEN4].get_feature_flags = NULL;
-	qat_asym_gen_dev_ops[QAT_GEN4].set_session = NULL;
+	qat_asym_gen_dev_ops[QAT_GEN4].cryptodev_ops =
+			&qat_asym_crypto_ops_gen1;
+	qat_asym_gen_dev_ops[QAT_GEN4].get_capabilities =
+			qat_asym_crypto_cap_get_gen1;
+	qat_asym_gen_dev_ops[QAT_GEN4].get_feature_flags =
+			qat_asym_crypto_feature_flags_get_gen1;
+	qat_asym_gen_dev_ops[QAT_GEN4].set_session =
+			qat_asym_crypto_set_session_gen1;
 }