From patchwork Fri Mar 11 20:05:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 108693 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A8F71A00C2; Fri, 11 Mar 2022 21:06:01 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B59F84115E; Fri, 11 Mar 2022 21:05:36 +0100 (CET) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by mails.dpdk.org (Postfix) with ESMTP id D86E24114A for ; Fri, 11 Mar 2022 21:05:34 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1647029135; x=1678565135; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rkEOuJ9bQgqhm/yaulgivKJr9q8nJf+LnBHWGoYzgqY=; b=gEm3OmjoJHkOvMMZHAXyd0SKF9fhNvnNfFGuDD21ccU8ycrQG6H+SidF N0AdLxFxW41La3Ui/QUhuUT/rzk2VI3c1eaWFXRkmkBZj/0ttZZw+5A7h VRD/hYCNWxSmJhA/3Ck4KD8dwRo2WBK4T4zdJThHMG1Jc+usYRtprTdbf n9OLFyw0fFeXXEaehUsX0t0YJ4KcWuwK4+jow7j2fZldUxBwb1nF0fjOB ir21ZQ1oeTRCkEzesYltJIihrtD29Md3614jph15L6t5ZjwLH2sintcRx DIP1g/E8Ngjlf4AyiyTz+wjTleNa7OijTb0iXtqwHJeVl+M89w4kw9toO A==; X-IronPort-AV: E=McAfee;i="6200,9189,10283"; a="253207394" X-IronPort-AV: E=Sophos;i="5.90,174,1643702400"; d="scan'208";a="253207394" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Mar 2022 12:05:33 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,174,1643702400"; d="scan'208";a="555444806" Received: from silpixa00399126.ir.intel.com ([10.237.223.34]) by orsmga008.jf.intel.com with ESMTP; 11 Mar 2022 12:05:32 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: Bruce Richardson , pbhagavatula@marvell.com Subject: [PATCH 5/5] eventdev: fix compilation with clang C++ builds Date: Fri, 11 Mar 2022 20:05:23 +0000 Message-Id: <20220311200523.1020050-6-bruce.richardson@intel.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220311200523.1020050-1-bruce.richardson@intel.com> References: <20220311200523.1020050-1-bruce.richardson@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org When compiling on FreeBSD with clang and include checking enabled, errors are emitted due to differences in how empty structs/unions are handled in C and C++, as C++ structs cannot have zero size. ../lib/eventdev/rte_eventdev.h:992:2: error: union has size 0 in C, non-zero size in C++ Since the contents of the union are all themselves of zero size, the actual union wrapper is unnecessary. We therefore remove it for C++ builds - though keep it for C builds for safety and clarity of understanding the code. The alignment constraint on the union is unnecessary in the case where the whole struct is aligned on a 16-byte boundary, so we add that constraint to the overall structure to ensure it applies for C++ code as well as C. Fixes: 1cc44d409271 ("eventdev: introduce event vector capability") Cc: pbhagavatula@marvell.com Signed-off-by: Bruce Richardson --- lib/eventdev/rte_eventdev.h | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/lib/eventdev/rte_eventdev.h b/lib/eventdev/rte_eventdev.h index 67c4a5e036..42a5660169 100644 --- a/lib/eventdev/rte_eventdev.h +++ b/lib/eventdev/rte_eventdev.h @@ -984,21 +984,31 @@ struct rte_event_vector { }; /**< Union to hold common attributes of the vector array. */ uint64_t impl_opaque; + +/* empty structures do not have zero size in C++ leading to compilation errors + * with clang about structure having different sizes in C and C++. + * Since these are all zero-sized arrays, we can omit the "union" wrapper for + * C++ builds, removing the warning. + */ +#ifndef __cplusplus /**< Implementation specific opaque value. * An implementation may use this field to hold implementation specific * value to share between dequeue and enqueue operation. * The application should not modify this field. */ union { +#endif struct rte_mbuf *mbufs[0]; void *ptrs[0]; uint64_t *u64s[0]; +#ifndef __cplusplus } __rte_aligned(16); +#endif /**< Start of the vector array union. Depending upon the event type the * vector array can be an array of mbufs or pointers or opaque u64 * values. */ -}; +} __rte_aligned(16); /* Scheduler type definitions */ #define RTE_SCHED_TYPE_ORDERED 0