From patchwork Thu Mar 10 12:38:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 108652 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B88F8A0093; Thu, 10 Mar 2022 13:39:44 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B36144117E; Thu, 10 Mar 2022 13:39:08 +0100 (CET) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by mails.dpdk.org (Postfix) with ESMTP id 9B9CD41174 for ; Thu, 10 Mar 2022 13:39:06 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1646915946; x=1678451946; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nqBLrMNyJ8B7PyuffDytONet+I9HomPfqQlOU4phDmM=; b=YieJphlBdOi896n7ikmKpr/FPO15xaW4fOoNvy9aX8LNO4DTd9FqcMoA jYaKlgCez2/x4n7ZSzAqrYbudgfHuatbu7eLkO3NInA2luKaIhgRWtOvW +kBos71OEdz0aYleYTqyIgREM8DMpx+HS2o2THf5TLMZMxAVxoBmcb0/v IiPaThP62G9FZyJ3OKYgzW77znOrx4YJVci3Cx15Y2fgPwsyJTYOJ6npA 1z8f0KLt7yJXQ+KkHnuueRggMQEa/6cO+TrP2M2/wdErSn4KSSW3WGpZE uyTsIscMDlQG64E22WGXDrjJdPsOkVgSOEy4jQiRulxytu9YT4xzvElDA A==; X-IronPort-AV: E=McAfee;i="6200,9189,10281"; a="315957629" X-IronPort-AV: E=Sophos;i="5.90,170,1643702400"; d="scan'208";a="315957629" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Mar 2022 04:39:06 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,170,1643702400"; d="scan'208";a="513970251" Received: from silpixa00399126.ir.intel.com ([10.237.223.34]) by orsmga006.jf.intel.com with ESMTP; 10 Mar 2022 04:39:04 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: john.mcnamara@intel.com, Bruce Richardson Subject: [PATCH v2 8/8] doc/linux_gsg: remove section on IOMMU pass-through Date: Thu, 10 Mar 2022 12:38:43 +0000 Message-Id: <20220310123843.612207-9-bruce.richardson@intel.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220310123843.612207-1-bruce.richardson@intel.com> References: <20220308145001.529734-1-bruce.richardson@intel.com> <20220310123843.612207-1-bruce.richardson@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The "Linux Drivers" section of the GSG already notes that, for use of UIO, the IOMMU must be disabled or put into pass-through mode. Therefore, there is no need to duplicate this information in the "additional functionality" section. Also the kernel configuration options documented in the section are enabled as standard on all common distro kernels, so the information should not be needed in a GSG doc. Signed-off-by: Bruce Richardson --- doc/guides/linux_gsg/enable_func.rst | 19 ------------------- doc/guides/linux_gsg/linux_drivers.rst | 2 +- 2 files changed, 1 insertion(+), 20 deletions(-) diff --git a/doc/guides/linux_gsg/enable_func.rst b/doc/guides/linux_gsg/enable_func.rst index 1f19842ddc..338c33290b 100644 --- a/doc/guides/linux_gsg/enable_func.rst +++ b/doc/guides/linux_gsg/enable_func.rst @@ -127,22 +127,3 @@ it is recommended that the ``rte_get_timer_cycles()`` and ``rte_get_timer_hz()`` These generic APIs can work with either TSC or HPET time sources, depending on what is requested by an application call to ``rte_eal_hpet_init()``, if any, and on what is available on the system at runtime. - -Using Linux IOMMU Pass-Through to Run DPDK with Intel\ |reg| VT-d ------------------------------------------------------------------- - -To enable Intel\ |reg| VT-d in a Linux kernel, a number of kernel configuration options must be set. These include: - -* ``IOMMU_SUPPORT`` - -* ``IOMMU_API`` - -* ``INTEL_IOMMU`` - -In addition, to run the DPDK with Intel\ |reg| VT-d, the ``iommu=pt`` kernel parameter must be used when using ``igb_uio`` driver. -This results in pass-through of the DMAR (DMA Remapping) lookup in the host. -Also, if ``INTEL_IOMMU_DEFAULT_ON`` is not set in the kernel, the ``intel_iommu=on`` kernel parameter must be used too. -This ensures that the Intel IOMMU is being initialized as expected. - -Please note that while using ``iommu=pt`` is compulsory for ``igb_uio`` driver, -the ``vfio-pci`` driver can actually work with both ``iommu=pt`` and ``iommu=on``. diff --git a/doc/guides/linux_gsg/linux_drivers.rst b/doc/guides/linux_gsg/linux_drivers.rst index 03cf264a0a..2e4c80ebd3 100644 --- a/doc/guides/linux_gsg/linux_drivers.rst +++ b/doc/guides/linux_gsg/linux_drivers.rst @@ -367,7 +367,7 @@ It can be loaded as shown below: .. note:: - If the devices used for DPDK are bound to the ``uio_pci_generic`` kernel module, + If the devices used for DPDK are bound to a UIO-based kernel module, please make sure that the IOMMU is disabled or is in passthrough mode. One can add ``intel_iommu=off`` or ``amd_iommu=off`` or ``intel_iommu=on iommu=pt`` in GRUB command line on x86_64 systems,